PIC16F54-E View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F54-E

Flash-Based, 8-Bit CMOS Microcontroller Series

Microchip Technology 

PIC16F5X

3.2 Data Memory Organization

Data memory is composed of registers or bytes of

RAM. Therefore, data memory for a device is specified

by its register file. The register file is divided into two

functional groups: Special Function Registers (SFR)

and General Purpose Registers (GPR).

The Special Function Registers include the TMR0

register, the Program Counter (PC), the STATUS regis-

ter, the I/O registers (ports) and the File Select Register

(FSR). In addition, Special Purpose Registers are used

to control the I/O port configuration and prescaler

options.

The General Purpose Registers are used for data and

control information under command of the instructions.

For the PIC16F54, the register file is composed of 7

Special Function Registers and 25 General Purpose

Registers (Figure 3-3).

For the PIC16F57, the register file is composed of 8

Special Function Registers, 8 General Purpose

Registers and 64 additional General Purpose

Registers that may be addressed using a banking

scheme (Figure 3-4).

For the PIC16F59, the register file is composed of 10

Special Function Registers, 6 General Purpose

Registers and 128 additional General Purpose

Registers that may be addressed using a banking

scheme (Figure 3-5).

3.2.1

GENERAL PURPOSE REGISTER

FILE

The register file is accessed either directly or indirectly

through the File Select Register (FSR). The FSR

register is described in Section 3.7 “Indirect Data

Addressing; INDF and FSR Registers”.

FIGURE 3-3:

File Address

00h

01h

02h

03h

04h

05h

06h

07h

PIC16F54 REGISTER FILE

MAP

INDF(1)

TMR0

PCL

STATUS

FSR

PORTA

PORTB

General

Purpose

Registers

Note 1:

1Fh

Not a physical register. See Section 3.7

“Indirect Data Addressing; INDF and FSR

Registers”.

FIGURE 3-4:

PIC16F57 REGISTER FILE MAP

FSR<6:5>

File Address

00h

01h

02h

03h

04h

05h

06h

07h

08h

0Fh

10h

00

01

10

11

INDF(1)

TMR0

PCL

STATUS

FSR

PORTA

PORTB

PORTC

General

Purpose

Registers

General

Purpose

Registers

20h

40h

60h

Addresses map back to

addresses in Bank 0.

2Fh

30h

General

Purpose

Registers

4Fh

50h

General

Purpose

Registers

6Fh

70h

General

Purpose

Registers

1Fh

3Fh

5Fh

7Fh

Bank 0

Bank 1

Bank 2

Bank 3

Note 1: Not a physical register. See Section 3.7 “Indirect Data Addressing; INDF and FSR Registers”.

DS41213D-page 14

© 2007 Microchip Technology Inc.

Share Link: