MT48LC8M16A2TG-6A_02ADD View Datasheet(PDF) - Micron Technology
Part Name
Description
Manufacturer
MT48LC8M16A2TG-6A_02ADD Datasheet PDF : 4 Pages
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PRELIMINARY
128Mb x16
SDRAM Addendum
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
Notes 5, 6, 8, 9,11; Notes appear on in the standard data sheet
AC CHARACTERISTICS
-6A
PARAMETER
Access time from CLK (pos. edge)
Address hold time
Address setup time
CLK high-level width
CLK low-level width
Clock cycle time
CKE hold time
CKE setup time
CS#, RAS#, CAS#, WE#, DQM hold time
CS#, RAS#, CAS#, WE#, DQM setup time
Data-in hold time
Data-in setup time
Data-out high-impedance time
Data-out low-impedance time
Data-out hold time (load)
Data-out hold time (no load)
ACTIVE to PRECHARGE command
ACTIVE to ACTIVE command period
ACTIVE to READ or WRITE delay
Refresh period (4,096 rows)
AUTO REFRESH period
PRECHARGE command period
ACTIVE bank a to ACTIVE bank b command
Transition time
WRITE recovery time1
Exit SELF REFRESH to ACTIVE command
CL = 3
CL = 3
CL = 3
SYMBOL
tAC(3)
tAH
tAS
tCH
tCL
tCK(3)
tCKH
tCKS
tCMH
tCMS
tDH
tDS
tHZ(3)
tLZ
tOH
tOHN
tRAS
tRC
tRCD
tREF
tRFC
tRP
tRRD
tT
tWR
tXSR
MIN
0.8
1.5
2.5
2.5
6
0.8
1.5
0.8
1.5
0.8
1.5
1
3
1.8
42
60
18
60
18
12
0.3
1 CLK +
6ns
12
67
MAX
5.4
5.4
120,000
64
1.2
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
ns
ns
ns
NOTES
27
23
10
28
7
25
20
NOTE:
1. Auto precharge mode only. The precharge timing budget (tRP) begins 6ns for -6A after the first clock delay, after the last WRITE is
executed. May not exceed limit set for precharge mode.
x16 Addendum
MT48lc8m16a2_addendum.fm - Rev 7/02
3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology Inc.
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