STM32L151C6(2013) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32L151C6
(Rev.:2013)

Ultra-low-power 32-bit MCU ARM®-based Cortex®-M3, 128KB Flash, 16KB SRAM, 4KB EEPROM, LCD, USB, ADC, DAC

STMicroelectronics 

STM32L151x6/8/B, STM32L152x6/8/B

Functional overview

3.1

Low power modes

The ultra-low-power STM32L15xxx supports dynamic voltage scaling to optimize its power

consumption in run mode. The voltage from the internal low-drop regulator that supplies the

logic can be adjusted according to the system’s maximum operating frequency and the

external voltage supply:

● In range 1 (VDD range limited to 2.0-3.6 V), the CPU runs at up to 32 MHz (refer to

Table 17 for consumption).

● In range 2 (full VDD range), the CPU runs at up to 16 MHz (refer to Table 17 for

consumption)

● In range 3 (full VDD range), the CPU runs at up to 4 MHz (generated only with the

multispeed internal RC oscillator clock source). Refer to Table 17 for consumption.

Seven low power modes are provided to achieve the best compromise between low power

consumption, short startup time and available wakeup sources:

● Sleep mode

In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can

wake up the CPU when an interrupt/event occurs.

Sleep mode power consumption: refer to Table 19.

● Low power run mode

This mode is achieved with the multispeed internal (MSI) RC oscillator set to the

minimum clock (65 kHz), execution from SRAM or Flash memory, and internal regulator

in low power mode to minimize the regulator's operating current. In the Low power run

mode, the clock frequency and the number of enabled peripherals are both limited.

Low power run mode consumption: refer to Table 20.

● Low power sleep mode

This mode is achieved by entering the Sleep mode with the internal voltage regulator in

Low power mode to minimize the regulator’s operating current. In the Low power sleep

mode, both the clock frequency and the number of enabled peripherals are limited; a

typical example would be to have a timer running at 32 kHz.

When wakeup is triggered by an event or an interrupt, the system reverts to the run

mode with the regulator on.

Low power sleep mode consumption: refer to Table 21.

● Stop mode with RTC

Stop mode achieves the lowest power consumption while retaining the RAM and

register contents and real time clock. All clocks in the VCORE domain are stopped, the

PLL, MSI RC, HSI RC and HSE crystal oscillators are disabled. The LSE or LSI is still

running. The voltage regulator is in the low power mode.

The device can be woken up from Stop mode by any of the EXTI line, in 8 µs. The EXTI

line source can be one of the 16 external lines. It can be the PVD output, the

Comparator 1 event or Comparator 2 event (if internal reference voltage is on), it can be

the RTC alarm(s), the USB wakeup, the RTC tamper events, the RTC timestamp event

or the RTC wakeup.

● Stop mode without RTC

Stop mode achieves the lowest power consumption while retaining the RAM and

register contents. All clocks are stopped, the PLL, MSI RC, HSI and LSI RC, LSE and

HSE crystal oscillators are disabled. The voltage regulator is in the low power mode.

The device can be woken up from Stop mode by any of the EXTI line, in 8 µs. The EXTI

line source can be one of the 16 external lines. It can be the PVD output, the

Doc ID 17659 Rev 8

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