µPD78F0034B, 78F0034BY, 78F0034B(A), 78F0034BY(A)
3.2 Non-Port Pins (2/2)
Pin Name I/O
Function
A8 to A15 Output Higher address bus for extending memory externally.
RD
Output Strobe signal output for read operation of external memory.
WR
Strobe signal output for write operation of external memory.
WAIT
Input Inserting wait for accessing external memory.
ASTB
Output Strobe output which externally latches address information output to
ports 4 and 5 to access external memory.
ANI0 to ANI7 Input A/D converter analog input.
ADTRG
Input A/D converter trigger signal input.
AVREF
Input A/D converter reference voltage input.
AVDD
– A/D converter analog power supply.
Set the voltage equal to VDD0 or VDD1.
AVSS
– A/D converter ground potential.
Set the voltage equal to VSS0 or VSS1.
RESET
Input System reset input.
X1
Input Connecting crystal resonator for main system clock oscillation.
X2
–
XT1
Input Connecting crystal resonator for subsystem clock oscillation.
XT2
–
VDD0
– Positive power supply voltage for ports.
VSS0
– Ground potential of ports.
VDD1
– Positive power supply (except ports).
VSS1
– Ground potential (except ports).
VPP
NCNote
– Applying high-voltage for program write/verify. Connect to VSS0 or VSS1
in normal operation mode.
– Not internally connected. Leave open.
Note NC is incorporated only in the 73-pin plastic FBGA.
After Reset
Alternate
Function
Input
P50 to P57
Input
P64
P65
Input
P66
Input
P67
Input
Input
–
–
P10 to P17
P03/INTP3
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Data Sheet U16369EJ1V0DS
15