S25FL127S(2005) View Datasheet(PDF) - Cypress Semiconductor
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S25FL127S Datasheet PDF : 131 Pages
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S25FL127S
Table 11.16 CFI Alternate Vendor-Specific Extended Query Parameter F0h RFU
Parameter Relative Byte
Address Offset
00h
01h
02h
...
10h
Data
F0h
0Fh
FFh
FFh
FFh
Description
Parameter ID (RFU)
Parameter Length (The number of following bytes in this parameter. Adding this value to the current location
value +1 = the first byte of the next parameter)
RFU
RFU
RFU
This parameter type (Parameter ID F0h) may appear multiple times and have a different length each time. The parameter is used to
reserve space in the ID-CFI map or to force space (pad) to align a following parameter to a required boundary.
Table 11.17 CFI Alternate Vendor-Specific Extended Query Parameter A5h, JEDEC SFDP (Sheet 1 of 2)
Parameter Relative Byte
Address Offset
00h
01h
SFDP Relative Dword
Address Offset
N/A
N/A
02h
03h
00h JEDEC SFDP
Parameter Dword-1
04h
05h
06h
07h
01h JEDEC SFDP
08h
Parameter Dword-2
09h
0Ah
0Bh
02h JEDEC SFDP
Parameter Dword-3
0Ch
0Dh
0Eh
0Fh
03h JEDEC SFDP
Parameter Dword-4
10h
11h
Data
A5h
3Ch
FFh
FFh
F3h (FLxxxSAG)
FFH
FFh
FFh
FFh
07h (128 Mb)
44h
EBh
08h
6Bh
08h
3Bh
80h
BBh
Description
CFI Parameter ID (JEDEC SFDP)
Parameter Length (The number of following bytes in this parameter. Adding this
value to the current location value +1 = the first byte of the next parameter)
Start of SFDP JEDEC parameter
Bits 7:5 = unused = 111b
Bit 4 = 06h is status register write instruction = 1
Bit 3 = 00h must be written to status register to enable program and erase = 1
Bit 2 = Program Buffer > 64 bytes = 1
Bits 1:0 = Uniform 4 kB erase unavailable = 11b
Uniform 4 kB erase opcode = not supported = FFh
Bit 23 = Unused = 1b
Bit 22 = Supports Quad Out Read = 1b
Bit 21 = Supports Quad I/O Read =1b
Bit 20 = Supports Dual I/O Read = 1b
Bit19 = Supports DDR 0= No, 1 = Yes
Bit 18:17 = Number of Address Bytes, 3 or 4 = 01b
Bit 16 = Supports Dual Out Read = 1b
Bits 31:24 = Unused = FFh
Density in bits, zero based
Bits 7:5 = number of Quad I/O Mode cycles = 010b
Bits 4:0 = number of Quad I/O Dummy cycles = 00100b for default latency code
00b
Quad I/O instruction code
Bits 23:21 = number of Quad Out Mode cycles = 000b
Bits 20:16 = number of Quad Out Dummy cycles = 01000b
Quad Out instruction code
Bits 7:5 = number of Dual Out Mode cycles = 000b
Bits 4:0 = number of Dual Out Dummy cycles = 01000b for default latency code
Dual Out instruction code
Bits 23:21 = number of Dual I/O Mode cycles = 100b
Bits 20:16 = number of Dual I/O Dummy cycles = 00000b
Dual I/O instruction code
Document Number: 001-98282 Rev. *F
Page 121 of 130
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