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PIC18F65J50 View Datasheet(PDF) - Microchip Technology

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PIC18F65J50 Datasheet PDF : 480 Pages
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PIC18F87J50 FAMILY
TABLE 1-3: PIC18F6XJ5X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number Pin Buffer
64-TQFP Type Type
Description
PORTF is a bidirectional I/O port.
RF2/PMA5/AN7/C2INB
RF2
PMA5
AN7
C2INB
16
I/O
ST
Digital I/O.
O
Parallel Master Port address.
I Analog Analog input 7.
I Analog Comparator 2 input B.
RF3/D-
RF3
D-
15
I
ST
Digital input.
I/O
USB differential minus line (input/output).
RF4/D+
RF4
D+
14
I
ST
Digital input.
I/O
USB differential plus line (input/output).
RF5/AN10/C1INB/CVREF
13
RF5
AN10
C1INB
CVREF
I
ST
I Analog
I Analog
O Analog
Digital input.
Analog input 10.
Comparator 1 input B.
Comparator reference voltage output.
RF6/AN11/C1INA
RF6
AN11
C1INA
12
I/O
ST
Digital I/O.
I Analog Analog input 11.
I Analog Comparator 1 input A.
RF7/SS1/C1OUT
RF7
SS1
C1OUT
11
I/O
ST
Digital I/O.
I
TTL
SPI slave select input.
O
TTL
Comparator 1 output.
Legend:
Note 1:
2:
3:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
O
= Output
P = Power
OD
= Open-Drain (no P diode to VDD)
Default assignment for ECCP2/P2A when CCP2MX Configuration bit is set.
Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared.
RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.
DS39775B-page 18
Preliminary
© 2007 Microchip Technology Inc.

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