BR24C01A-W View Datasheet(PDF) - ROHM Semiconductor

Part Name

Description

Manufacturer

BR24C01A-W

I2C BUS compatible serial EEPROM

ROHM Semiconductor 

Memory ICs

BR24C01A-W / BR24C01AF-W / BR24C01AFJ-W / BR24C01AFV-W / BR24C02-W / BR24C02F-W /

BR24C02FJ-W / BR24C02FV-W / BR24C04-W / BR24C04F-W / BR24C04FJ-W / BR24C04FV-W

!Operation notes

(1) During power rise

During power rise, the VCC may rise passing though the low voltage domain in which the IC internal circuit does not

work. For this reason, there is a risk of misoperation when the power rises without full IC internal reset.

To prevent this, pay attention to the following points during a power rise.

1) Set SCL = SDA = “HIGH”

2) Raise the power so as to active the Power On Reset (P. O. R) circuit.

Follow the steps below as to operate the P. O. R. circuit properly.

1) Set the power rise time (tR) to within 10ms.

2) Set the OFF domain for once power has been cut to 100mS minimum.

VCC

tR

tOFF

(2) SDA terminal pull-up resistance

The SDA terminal is an open drain output. Consequently, it requires an external pull-up resistance. The

appropriate pull-up resistance value is selected from the IC VOL-IOL features., which have been appended as

measuring data, as well as VIL and ILI and other personal icons that control the IC in question.

Recommended values 2.0k to 10kW

0.45

0.4

0.35

0.3

0.25

0.2

0.15

0.1

0.05

0

0

1

2

3

4

OUTPUT CURRENT : IOL (mA)

VCC=3.0V

VCC=5.0V

Ta=85°C

VCC=3.0V

VCC=5.0V

Ta=25°C

5

VCC=3.0V

VCC=5.0V

Ta=−40°C

Fig.19 VOL−IOL features (Note : Typ.)

Note : All memory array data are set to “FF” status at time of shipping.

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