16 Mbit / 32 Mbit Multi-Purpose Flash Plus
SST39VF1601 / SST39VF3201
SST39VF1602 / SST39VF3202
Data Sheet
TRC
TAA
ADDRESS AMS-0
TCE
CE#
OE#
VIH
WE#
TOE
TOLZ
DQ15-0
HIGH-Z
TCLZ
TOH
DATA VALID
Note: AMS = Most significant address
AMS = A19 for SST39VF1601/1602 and A20 for SST39VF3201/3202
FIGURE 4: Read Cycle Timing Diagram
TOHZ
TCHZ
DATA VALID
HIGH-Z
1223 F03.3
INTERNAL PROGRAM OPERATION STARTS
TBP
ADDRESS AMS-0
5555
2AAA
5555
ADDR
TAH
TWP
TDH
WE#
TAS
TWPH
TDS
OE#
CE#
TCH
TCS
DQ15-0
XXAA XX55 XXA0
DATA
Note:
SW0
SW1
SW2
WORD
(ADDR/DATA)
AMS = Most significant address
AMS = A19 for SST39VF1601/1602 and A20 for SST39VF3201/3202
WP# must be held in proper logic state (VIL or VIH) 1 µs prior to and 1 µs after the command sequence
X can be VIL or VIH, but no other value
1223 F04.4
FIGURE 5: WE# Controlled Program Cycle Timing Diagram
©2008 Silicon Storage Technology, Inc.
15
S71223-05-000
6/08