BTS610L1 View Datasheet(PDF) - Infineon Technologies

Part Name

Description

Manufacturer

BTS610L1

Smart Two Channel Highside Power Switch

Infineon Technologies 

BTS 610 L1

Pin

Symbol

Function

1

OUT1 (Load, L) Output 1, protected high-side power output of channel 1

2

GND

Logic ground

3

IN1

Input 1, activates channel 1 in case of logical high signal

4

Vbb

Positive power supply voltage,

the tab is shorted to this pin

5

ST

Diagnostic feedback: open drain, low on failure

6

IN2

Input 2, activates channel 2 in case of logical high signal

7

OUT2 (Load, L) Output 2, protected high-side power output of channel 2

Maximum Ratings at Tj = 25 °C unless otherwise specified

Parameter

Symbol

Supply voltage (overvoltage protection see page 3)

Vbb

Supply voltage for full short circuit protection

Tj Start=-40 ...+150°C

Load dump protection2) VLoadDump = UA + Vs, UA = 13.5 V

RI3)= 2 Ω, RL= 5.3 Ω, td= 200 ms, IN= low or high

Vbb

VLoad dump4)

Load current (Short circuit current, see page 4)

IL

Operating temperature range

Tj

Storage temperature range

Tstg

Power dissipation (DC), TC ≤ 25 °C

Ptot

Electrostatic discharge capability (ESD)

IN: VESD

(Human Body Model)

all other pins:

acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993

Input voltage (DC)

VIN

Current through input pin (DC)

IIN

Current through status pin (DC)

IST

see internal circuit diagrams page 6

Values Unit

43 V

24 V

60 V

self-limited A

-40 ...+150 °C

-55 ...+150

36 W

1.0 kV

2.0

-10 ... +16 V

±2.0 mA

±5.0

Thermal Characteristics

Parameter and Conditions

Symbol

Thermal resistance

chip - case, both channels: RthJC

each channel:

junction - ambient (free air): RthJA

Values

Unit

min typ max

--

-- 3.5 K/W

--

-- 7.0

--

-- 75

2) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a

150 Ω resistor in the GND connection and a 15 kΩ resistor in series with the status pin. A resistor for the

protection of the input is integrated.

3) RI = internal resistance of the load dump test pulse generator

4) VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839

Semiconductor Group

2

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