74OL60113S(2003) View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
74OL60113S Datasheet PDF : 15 Pages
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HIGH-SPEED
LOGIC-TO-LOGIC OPTOCOUPLERS
LSTTL TO
TTL BUFFER
TTL INVERTER
CMOS BUFFER
CMOS INVERTER
74OL6000
74OL6001
74OL6010
74OL6011
APPLICATION
Local area data communication systems can greately improve their noise immunity by including OPOTOLOGIC gates in the
design.
The Optologic input amplifier offers the feature of very high input impedance that permits their use as bridged line receivers. The
system show above illustrates an optically isolated transmitter and multidrop receiver system. The network uses a 74OL6000 and
buffer (Figure D) to isolate the transmitter and drive the 75Ω coax cable. This application uses a 1000 ft. aerial suspension 75Ω
CATV coax cable with data taps at 250 ft. intervals. The 74OL6001s function as bridged receivers, and as many as 30 receivers
could be placed along the line with minimal signal degradation. The communication cable is terminated with a single 75Ω load at
the far end of the line.
Signal quality "Eye Pattern" is shown in Figures A, B and C with a 10MBaud NRZ Psuedo-Random Sequence (PRS). Traces 1-3 in
Figure A describes the transmitter section. Traces 4-7 in Figure B show the output of the four Optologic bridged terminations.
Traces 8-11 in Figure C illustrate "Eye Pattern" as seen at the output of a 74LS04 logic gate. The data quality is well preserved in
that only a 30% Eye closure is seen at the receiver located 1000 ft. from the transmitter.
The data communication system is completely optically isolated from all of the terminal equipments. Power for the transmitter
(VCCO) and receiver (VCCI) is taken from an isolated power supply and distributed through a drain or messenger wire.
Figure A
Figure B
Figure C
HORIZONTAL = 20 ns/DIV 42-11
VERTICAL = 2 V/DIV
HORIZONTAL = 20 ns/DIV 42-12, 02
VERTICAL = 2 V/DIV
HORIZONTAL = 20 ns/DIV 42-13/03
VERTICAL = 2 V/DIV
0.1 µF
100 µF
1.1 KΩ
10 Ω
2N4252
1.1 KΩ
2N4252
2N2222
ALL DIODES
1N6263
1 KΩ
Figure D Buffer
© 2003 Fairchild Semiconductor Corporation
PRSG
100 ns BIT
INTERVAL
1
2
3
74OL6000 BUFFER
250 FT.
1000 FT.
250 FT.
250 FT.
250 FT.
75 Ω
TERMINAION
74 OL6001
74 OL6001
74 OL6001
74 OL6001
4
5
6
7
8 LS04
9 LS04
10 LS04
11 LS04
Page 14 of 15
3/19/03
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