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P89V51RB2FA View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
Manufacturer
P89V51RB2FA Datasheet PDF : 80 Pages
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NXP Semiconductors
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
5.2 Pin description
Table 3. P89V51RB2/RC2/RD2 pin description
Symbol
Pin
Type
DIP40 TQFP44 PLCC44
P0.0 to P0.7
I/O
P0.0/AD0
39
37
43
I/O
I/O
P0.1/AD1
38
36
42
I/O
I/O
P0.2/AD2
37
35
41
I/O
I/O
P0.3/AD3
36
34
40
I/O
I/O
P0.4/AD4
35
33
39
I/O
I/O
P0.5/AD5
34
32
38
I/O
I/O
P0.6/AD6
33
31
37
I/O
I/O
P0.7/AD7
32
30
36
I/O
I/O
P1.0 to P1.7
I/O with
internal
pull-up
P1.0/T2
1
40
2
I/O
I/O
P1.1/T2EX 2
41
3
I/O
I
Description
Port 0: Port 0 is an 8-bit open drain bidirectional I/O port.
Port 0 pins that have ‘1’s written to them float, and in this
state can be used as high-impedance inputs. Port 0 is also
the multiplexed low-order address and data bus during
accesses to external code and data memory. In this
application, it uses strong internal pull-ups when
transitioning to ‘1’s. Port 0 also receives the code bytes
during the external host mode programming, and outputs
the code bytes during the external host mode verification.
External pull-ups are required during program verification
or as a general purpose I/O port.
P0.0 — Port 0 bit 0.
AD0 — Address/data bit 0.
P0.1 — Port 0 bit 1.
AD1 — Address/data bit 1.
P0.2 — Port 0 bit 2.
AD2 — Address/data bit 2.
P0.3 — Port 0 bit 3.
AD3 — Address/data bit 3.
P0.4 — Port 0 bit 4.
AD4 — Address/data bit 4.
P0.5 — Port 0 bit 5.
AD5 — Address/data bit 5.
P0.6 — Port 0 bit 6.
AD6 — Address/data bit 6.
P0.7 — Port 0 bit 7.
AD7 — Address/data bit 7.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal
pull-ups. The Port 1 pins are pulled high by the internal
pull-ups when ‘1’s are written to them and can be used as
inputs in this state. As inputs, Port 1 pins that are
externally pulled LOW will source current (IIL) because of
the internal pull-ups. P1.5, P1.6, P1.7 have high current
drive of 16 mA. Port 1 also receives the low-order address
bytes during the external host mode programming and
verification.
P1.0 — Port 1 bit 0.
T2 — External count input to Timer/counter 2 or Clock-out
from Timer/counter 2.
P1.1 — Port 1 bit 1.
T2EX: Timer/counter 2 capture/reload trigger and direction
control.
P89V51RB2_RC2_RD2_5
Product data sheet
Rev. 05 — 12 November 2009
© NXP B.V. 2009. All rights reserved.
6 of 80

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