LC8901Q View Datasheet(PDF) - SANYO -> Panasonic
Part Name
Description
Manufacturer
LC8901Q Datasheet PDF : 15 Pages
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LC8901, 8901Q
LPF Pin
Setting the LPF pin high sets the PLL low-pass filter time constant to a mode in which it is automatically switched by the
PLL locking state. This pin should be set high normally.
Microprocessor Interface
The data input pin setting, output data format setting, and subcode output are controlled through the microprocessor
interface. The following item describes the interface I/O formats.
Microprocessor Interface Format
Address
Bits B0 to A3 in the format figure are the address. There are two dedicated addresses allocated, one for data input and
one for data output. Use the input address for data input and the output address for data output.
Address Codes
Mode
Data input
Data output
B0
B1
B2
B3
A0
A1
A2
A3
H
L
H
L
L
H
H
L
L
H
H
L
L
H
H
L
No. 4079-9/15
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