NT6862 View Datasheet(PDF) - Novatek Microelectronics

Part Name

Description

Manufacturer

NT6862

8-Bit Microcontroller for Monitor

Novatek Microelectronics 

NT6862-5xxxx

Pin Description (continued)

Pin No.

40 Pin 42 Pin

36

38

37

39

38

40

39

41

40

42

-

6

-

37

Designation Reset Init.

DAC5/SDA1

[ MODE2 ]

DAC4/SCL1

[ MODE1 ]

DAC3

[ MODE0 ]

HSYNCI

VSYNCI/INTV VSYNCI

[ A14 ]

P40

P41

I/O

Description

O Open drain 5V, D/A converter output 5, shared with open

drain SDA1 line of I2C bus, Schmitt Trigger buffer

[ I ] [ OTP ROM mode select ]

O Open drain 5V, D/A converter output 4, shared with open

drain SCL1 line of I2C bus, Schmitt Trigger buffer

[ I ] [ OTP ROM mode select ]

O Open drain 5V, D/A converter output 3

[ I ] [ OTP ROM mode select ]

I Debouncing & Schmitt Trigger input pin for video

horizontal sync signal internally pulled high, shared with

composite sync input. A jitter filter is added at the front

end, it could effectually reduce the jitter interference of

external noisy Hsync input.

I Debouncing & Schmitt Trigger input pin for video vertical

sync signal, internal pull high, shared with input pin of

external interrupt source intv with Schmitt Trigger,

selectable triggered, and internal pulled up 22KΩ register

[ I ] [ OTP ROM program address buffer ]

I/O Bi-directional I/O pin with internal pulled up 22KΩ

register, only 42 pin S-DIP available

I/O Bi-directional I/O pin with internal pulled up 22KΩ

register, only 42 pin S-DIP available

* This RESET pin must be pulled high by an external pulled-up register (5KΩ suggestion), or it will remain in low voltage

and continually keep the system in a rest state..

5

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