A2V64S40 View Datasheet(PDF) - Unspecified
Part Name
Description
Manufacturer
A2V64S40 Datasheet PDF : 38 Pages
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A2V64S40CTP
64M Single Data Rate Synchronous DRAM
DC CHARACTERISTICS
Recommended operating conditions (Voltage referenced to VSS = 0V, TA = 0 to 70°C)
Parameter
Symbol
Test Condition
Version
-5
-6
-7
Unit Note
Operating Current
(One Bank Active)
Burst length = 1
ICC1
tRC ≧ tRC(min)
IO = 0 mA
80
70
60
mA
1
Precharge Standby Current in
power-down mode
ICC2P
ICC2PS
CKE ≦ VIL(max), tCC = 10ns
CKE & CLK ≦ VIL(max), tCC = ∞
2
2
2
mA
1
1
1
CKE ≧ VIH(min), CS ≧ VIH(min), tCC = 10ns
ICC2N Input signals are changed one time during 20
20
20
Precharge Standby Current
in non power-down mode
20ns
mA
ICC2NS
CKE ≧ VIH(min), CLK ≦ VIL(max), tCC = ∞
Input signals are stable
15
15
15
Active Standby Current
in power-down mode
ICC3P
ICC3PS
CKE ≦ VIL(max), tCC = 10ns
CKE & CLK ≦ VIL(max), tCC = ∞
10
10
10
mA
10
10
10
Active Standby Current
in non power-down mode
(One Bank Active)
CKE ≧ VIH(min), CS ≧ VIH(min), tCC = 10ns
ICC3N Input signals are changed one time during 30
25
20
20ns
mA
ICC3NS
CKE ≧ VIH(min), CLK ≦ VIL(max), tCC = ∞
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10
10
10
Input signals are stable
Operating Current
(Burst Mode)
IO = 0 mA
ICC4
Page burst
4Banks Activated
tCCD = 2CLKs
Refresh Current
Self Refresh Current
ICC5
ICC6
tARFC ≧ tARFC(min)
CKE ≦ 0.2V
NOTES:
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ).
100
90
80
mA
1
150
130
110
mA
2
1.5
1.5
1.5
mA
Revision 2.1
Page 5/36
Sep., 2008
Datasheet pdf - http://www.DataSheet4U.net/
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