KSZ9031RNX(2012) View Datasheet(PDF) - Micrel

Part Name

Description

Manufacturer

KSZ9031RNX
(Rev.:2012)

Gigabit Ethernet Transceiver with RGMII Support

Micrel 

Micrel, Inc.

KSZ9031RNX

RGMII Signal Definition

Table 3 describes the RGMII signals. Refer to the RGMII Version 2.0 Specification for more detailed information.

RGMII

Signal Name

(per spec)

TXC

RGMII

Signal Name

(per KSZ9031RNX)

GTX_CLK

Pin Type

(with respect

to PHY)

Input

TX_CTL

TXD[3:0]

RXC

TX_EN

TXD[3:0]

RX_CLK

Input

Input

Output

RX_CTL

RXD[3:0]

RX_DV

RXD[3:0]

Output

Output

Pin Type

(with respect

to MAC)

Output

Output

Output

Input

Input

Input

Description

Transmit Reference Clock

(125MHz for 1000Mbps, 25MHz for

100Mbps, 2.5MHz for 10Mbps)

Transmit Control

Transmit Data[3:0]

Receive Reference Clock

(125MHz for 1000Mbps, 25MHz for

100Mbps, 2.5MHz for 10Mbps)

Receive Control

Receive Data[3:0]

Table 3. RGMII Signal Definition

RGMII Signal Diagram

The KSZ9031RNX RGMII pin connections to the MAC are shown in Figure 4.

Figure 4. KSZ9031RNX RGMII Interface

RGMII Pad Skew Registers

Pad skew registers are available for all RGMII pins (clocks, control signals, and data bits) to provide programming options

to adjust or correct the timing relationship for each RGMII pin. Because RGMII is a source-synchronous bus interface, the

timing relationship needs to be maintained only within the RGMII pin’s respective timing group.

• RGMII transmit timing group pins:

GTX_CLK, TX_EN, TXD[3:0]

• RGMII receive timing group pins:

RX_CLK, RX_DV, RXD[3:0]

October 2012

23

M9999-103112-1.0

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