KSZ9031RNX View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

KSZ9031RNX

Gigabit Ethernet Transceiver with RGMII Support

Microchip Technology 

KSZ9031RNX

FIGURE 3-6:

REMOTE (ANALOG) LOOPBACK

KSZ9031RNX

RJ-45

AFE

(ANALOG)

PCS

(DIGITAL)

RGMII

CAT-5

(UTP)

RJ-45

1000BASE-T

LINK PARTNER

The following programming steps and register settings are used for remote loopback mode.

1. Set Register 0h,

- Bits [6, 13] = 10 // Select 1000 Mbps speed

- Bit [12] = 0

// Disable auto-negotiation

- Bit [8] = 1

// Select full-duplex mode

Or just auto-negotiate and link up at 1000BASE-T full-duplex mode with the link partner.

2. Set Register 11h,

- Bit [8] = 1

// Enable remote loopback mode

3.14 LinkMD® Cable Diagnostic

The LinkMD function uses Time Domain Reflectometry (TDR) to analyze the cabling plant for common cabling prob-

lems, such as open circuits, short circuits, and impedance mismatches.

LinkMD operates by sending a pulse of known amplitude and duration down the selected differential pair, then analyzing

the polarity and shape of the reflected signal to determine the type of fault: open circuit for a positive/non-inverted ampli-

tude reflection and short circuit for a negative/inverted amplitude reflection. The time duration for the reflected signal to

return provides the approximate distance to the cabling fault. The LinkMD function processes this TDR information and

presents it as a numerical value that can be translated to a cable distance.

LinkMD is initiated by accessing Register 12h, the LinkMD Cable Diagnostic register, in conjunction with Register 1Ch,

the Auto MDI/MDI-X register. The latter register is needed to disable the Auto MDI/MDI-X function before running the

LinkMD test. Additionally, a software reset (Reg. 0h, Bit [15] = 1) should be performed before and after running the

LinkMD test. The reset helps to ensure the KSZ9031RNX is in the normal operating state before and after the test.

3.15 NAND Tree Support

The KSZ9031RNX provides parametric NAND tree support for fault detection between chip I/Os and board. NAND tree

mode is enabled at power-up/reset with the MODE[3:0] strap-in pins set to ‘0100’. Table 3-11 lists the NAND tree pin

order.

TABLE 3-11:

NAND TREE TEST PIN ORDER FOR KSZ9031RNX

Pin

LED2

LED1/PME_N1

TXD0

TXD1

TXD2

TXD3

Description

Input

Input

Input

Input

Input

Input

DS00002117C-page 26

 2016 Microchip Technology Inc.

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