IDT7016L20PFI8 View Datasheet(PDF) - Integrated Device Technology

Part Name

Description

Manufacturer

IDT7016L20PFI8

HIGH-SPEED 16K X 9 DUAL-PORT STATIC RAM

Integrated Device Technology 

IDT7016S/L

High-Speed 16K x 9 Dual-Port Static RAM

Military, Industrial and Commercial Temperature Ranges

Timing Waveform of Read with BUSY(2,4,5) (M/S = VIH)

tWC

ADDR"A"

MATCH

tWP

R/W"A"

DATAIN "A"

ADDR"B"

BUSY"B"

tAPS (1)

tDW

VALID

MATCH

tDH

tBDA

tBDD

tWDD

DATAOUT "B"

tDDD (3)

NOTES:

1. To ensure that the earlier of the two ports wins. tAPS is ignored for M/S=VIL.

2. CEL = CER = VIL.

3. OE = VIL for the reading port.

4. If M/S=VIL (SLAVE), BUSY is an input. Then for this example BUSY“A” = VIH and BUSY“B” input is shown above.

5. All timing is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite from Port "A".

VALID

3190 drw 13

Timing Waveform of Write with BUSY(3)

tWP

R/W"A"

tWB

BUSY"B"

tWH (1)

R/W"B"

(2)

NOTES:

1. tWH must be met for both BUSY input (SLAVE) and output (MASTER).

2. BUSY is asserted on port "B" blocking R/W"B", until BUSY"B" goes HIGH.

3. All timing is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite from Port "A".

3190 drw 14

6.1432

Share Link: