M48T59 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
M48T59 Datasheet PDF : 29 Pages
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M48T59, M48T59Y, M48T59V*
OPERATION MODES
As Figure 6., page 5 shows, the static memory ar-
ray and the quartz-controlled clock oscillator of the
M48T59/Y/V are integrated on one silicon chip.
The two circuits are interconnected at the upper
eight memory locations to provide user accessible
BYTEWIDEâ„¢ clock information in the bytes with
addresses 1FF8h-1FFFh. The clock locations
contain the century, year, month, date, day, hour,
minute, and second in 24 hour BCD format (except
for the century). Corrections for 28, 29 (leap year -
valid until 2100), 30, and 31 day months are made
automatically. Byte 1FF8h is the clock control reg-
ister. This byte controls user access to the clock
information and also stores the clock calibration
setting.
The eight clock bytes are not the actual clock
counters themselves; they are memory locations
consisting of BiPORTâ„¢ READ/WRITE memory
cells. The M48T59/Y/V includes a clock control cir-
cuit which updates the clock bytes with current in-
formation once per second. The information can
be accessed by the user in the same manner as
any other location in the static memory array.
The M48T59/Y/V also has its own Power-fail De-
tect circuit. The control circuitry constantly moni-
tors the single 5V/3.3V supply for an out of
tolerance condition. When VCC is out of tolerance,
the circuit write protects the SRAM, providing a
high degree of data security in the midst of unpre-
dictable system operation brought on by low VCC.
As VCC falls below the Battery Back-up Switchover
Voltage (VSO), the control circuitry connects the
battery which maintains data and clock operation
until valid power returns.
Table 2. Operating Modes
Mode
VCC
E
G
Deselect
WRITE
READ
READ
4.75 to 5.5V
or
4.5 to 5.5V
or
3.0 to 3.6V
VIH
X
VIL
X
VIL
VIL
VIL
VIH
Deselect
VSO to VPFD (min)(1)
X
X
Deselect
≤ VSO(1)
X
X
Note: X = VIH or VIL; VSO = Battery Back-up Switchover Voltage.
1. See Table 13., page 22 for details.
W
DQ7-DQ0
X
High Z
VIL
DIN
VIH
DOUT
VIH
High Z
X
High Z
Power
Standby
Active
Active
Active
CMOS Standby
X
High Z Battery Back-up Mode
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