TS8388B
Table 5-3. Electrical Specifications (Continued)
Parameter
Test
Value
Symbol
Level
Min
Typ
Max
Unit
Integral nonlinearity
1, 2
–1.0
0.7
–
lsb
INL-
6
–1.2
0.9
–
lsb
Integral nonlinearity
INL+
1, 2
–
6
–
0.7
1.0
lsb
0.9
1.2
lsb
No missing code
–
Guaranteed over specified temperature range
Gain error
Input offset voltage
–
1, 2
–10
–2
10
% FS
6
–11
–2
11
% FS
1, 2
–26
–5
26
mV
–
6
–30
–5
30
mV
Gain error drift
Offset error drift
–
4
100
125
150
ppm/°C
–
4
40
50
60
ppm/°C
Transient Performance
Bit Error Rate
FS = 1 Gsps FIN = 62.5 MHz
ADC settling time
VIN -VINB = 400 mVpp
Overvoltage recovery time
BER
TS
TOR
4
–
–
1E-12
Error/
sample
4
–
0.5
1
ns
4
–
0.5
1
ns
AC Performance
Single-ended or differential input and clock mode, 50% clock duty cycle (CLK, CLKB), Binary output data format,
TJ = 70°C, unless otherwise specified.
Signal to Noise and Distortion ratio
–
–
–
–
–
FS = 1 Gsps, FIN = 20 MHz
FS = 1 Gsps, FIN = 500 MHz
FS = 1 Gsps, FIN = 1000 MHz (-1 dBFs)
FS = 50 Msps, FIN = 25 MHz
Effective Number of Bits
4
42
44
–
dB
SINAD
4
41
43
–
dB
4
38
40
–
dB
1, 2, 6
40
44
–
dB
–
–
–
–
–
FS = 1 Gsps, FIN = 20 MHz
FS = 1 Gsps, FIN = 500 MHz
FS = 1 Gsps, FIN = 1000 MHz (–1 dBFs)
FS = 50 Msps, FIN = 25 MHz
Signal to Noise Ratio
4
7.0
7.2
ENOB
4
6.6
6.8
4
6.2
6.4
1, 2, 6
7.0
7.2
–
–
–
–
Bits
–
Bits
–
Bits
–
Bits
–
–
FS = 1 Gsps, FIN = 20 MHz
FS = 1 Gsps, FIN = 500 MHz
FS = 1 Gsps, FIN = 1000 MHz (–1 dBFs)
FS = 50 Msps, FIN = 25 MHz
4
42
45
–
dB
SNR
4
41
44
–
dB
4
41
44
–
dB
1, 2, 6
44
45
–
dB
Note
(2)(3)
(3)
(2)(4)
(2)
(2)
(2)
(2)
e2v semiconductors SAS 2009
7
0860F–BDC–12/09