UPD78F0833Y View Datasheet(PDF) - NEC => Renesas Technology
Part Name
Description
Manufacturer
UPD78F0833Y Datasheet PDF : 56 Pages
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µPD78F0833Y
FUNCTION OVERVIEW
Item
Internal memory Flash memory
High-speed RAM
Expansion RAM
Memory space
General-purpose registers
Minimum instruction execution time
Instruction set
I/O ports
A/D converter
Serial interface
Timer
Timer outputs
Clock output
Bus controller
Vectored interrupts Maskable
Non-maskable
Software
Power supply voltage
Operating ambient temperature
Package
µPD78F0833Y
60 KB
1,024 bytes
2,048 bytes
64 KB
8 bits × 32 registers (8 bits × 8 registers × 4 banks)
On-chip minimum instruction execution time variable function
0.48 µs/0.96 µs/1.92 µs/3.84 µs/7.68 µs (@ 4.19 MHz operation)
• 16-bit operation
• Multiply/divide (8 bits × 8 bits, 16 bits ÷ 8 bits)
• Bit manipulation (set, reset, test, and Boolean operation)
• BCD adjust, etc.
Total:
65
• CMOS input:
54
• TTL input/CMOS output: 8
• N-ch open-drain I/O: 3
• 8-bit resolution × 8 channels × 2
• 3-wire serial I/O mode: 2 channels
• UART mode:
• I2C bus mode:
1 channel
1 channel
• 16-bit timer/event counter: 2 channels
• 8-bit timer/event counter: 3 channels
• Watch timer:
1 channel
• Watchdog timer:
1 channel
5 (8-bit PWM output: 3)
32.8 kHz, 65.5 kHz, 130.9 kHz, 261.9 kHz, 523.6 kHz, 1.05 MHz, 2.10 MHz,
4.19 MHz (@ 4.19 MHz operation with system clock)
J1850 (CLASS2) bus interface
Internal: 19
External: 9
Internal: 1
1
VDD = 4.5 to 5.5 V
TA = –40 to +85°C
80-pin plastic QFP (14 × 14)
4
Data Sheet U15013EJ2V0DS
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