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7C1338-100 View Datasheet(PDF) - Cypress Semiconductor

Part Name
Description
Manufacturer
7C1338-100
Cypress
Cypress Semiconductor Cypress
7C1338-100 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CY7C1338
Cycle Description Table[1, 2, 3]
Cycle Description
Deselected Cycle, Power-down
ADD
Used
None
CE1 CE3 CE2 ZZ ADSP ADSC ADV WE OE CLK DQ
HX XL
X
L
X
X
X L-H High-Z
Deselected Cycle, Power-down None
L X LL
L
X
X
X
X L-H High-Z
Deselected Cycle, Power-down None
L H XL
L
X
X
X
X L-H High-Z
Deselected Cycle, Power-down None
L X LL
H
L
X
X
X L-H High-Z
Deselected Cycle, Power-down None X X X L
H
L
X
X
X L-H High-Z
Snooze Mode, Power-down
None
X X XH
X
X
X
X
X
X High-Z
Read Cycle, Begin Burst
External L L H L
L
X
X
X
L L-H Q
Read Cycle, Begin Burst
External L L H L
L
X
X
X H L-H High-Z
Write Cycle, Begin Burst
External L L H L
H
L
X
L
X L-H D
Read Cycle, Begin Burst
External L L H L
H
L
X
H
L L-H Q
Read Cycle, Begin Burst
External L L H L
H
L
X
H H L-H High-Z
Read Cycle, Continue Burst
Next
X X XL
H
H
L
H
L L-H Q
Read Cycle, Continue Burst
Next
X X XL
H
H
L
H H L-H High-Z
Read Cycle, Continue Burst
Next
HX XL
X
H
L
H
L L-H Q
Read Cycle, Continue Burst
Next
HX XL
X
H
L
H H L-H High-Z
Write Cycle, Continue Burst
Next
X X XL
H
H
L
L X L-H D
Write Cycle, Continue Burst
Next
HX XL
X
H
L
L X L-H D
Read Cycle, Suspend Burst Current X X X L
H
H
H H L L-H Q
Read Cycle, Suspend Burst Current X X X L
H
H
H H H L-H High-Z
Read Cycle, Suspend Burst Current H X X L
X
H
H H L L-H Q
Read Cycle, Suspend Burst Current H X X L
X
H
H H H L-H High-Z
Write Cycle, Suspend Burst Current X X X L
H
H
H
L
X L-H D
Write Cycle, Suspend Burst Current H X X L
X
H
H
L
X L-H D
Notes:
1. X=Don't Care,1=Logic HIGH, 0=Logic LOW.
2. The SRAM always initiates a read cycle when ADSP asserted, regardless of the state of GW, BWE, or BWS[3:0]. Writes may occur only on subsequent clocks
after the ADSP or with the assertion of ADSC. As a result, OE must be driven HIGH prior to the start of the write cycle to allow the outputs to three-state. OE
is a Don't Carefor the remainder of the write cycle.
3. OE is asynchronous and is not sampled with the clock rise. During a read cycle DQ=High-Z when OE is inactive, and DQ=data when OE is active.
6

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