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74HC4515(2018) View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
Manufacturer
74HC4515 Datasheet PDF : 14 Pages
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Nexperia
74HC4515
4-to-16 line decoder/demultiplexer with input latches; inverting
VI
An input
VM
GND
VI
LE input
tsu
transparant
th
latched
VM
tsu
transparant
th
latched
GND
tW
aaa-028168
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Figure 7. Data set-up and hold times for An input to LE input and LE input pulse width
Table 8. Measurement points
Input
Output
VI
VM
GND to VCC
0.5VCC
VM
0.5VCC
VX
0.1VCC
VY
0.9VCC
VI 90 %
negative
pulse
GND
VI
positive
pulse
GND 10 %
VM
10 %
tf
tr
90 %
VM
VI
G
RT
tW
tW
VCC
DUT
VM
tr
tf
VM
VO
CL
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Test data is given in Table 9.
Definitions for test circuit:
RT = Termination resistance; should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
Figure 8. Test circuit for measuring switching times
Table 9. Test data
Input
VI
tr, tf
GND to VCC
6 ns
Load
CL
15 pF, 50 pF
74HC4515
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 2 July 2018
© Nexperia B.V. 2018. All rights reserved.
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