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LC66558B View Datasheet(PDF) - SANYO -> Panasonic

Part Name
Description
Manufacturer
LC66558B Datasheet PDF : 22 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LC66556B, 66558B
Continued from preceding page.
Pin
PE0/TRA
PE1/TRB
OSC1
OSC2
RES
TEST
VDD
VSS
I/O
Function
Dedicated input port
I
• Can be switched under software
control to function as a three-
value input port.
System clock oscillator connections
I When an external clock is used,
O leave OSC2 open and input the
signal to OSC1.
System reset input
I
• The CPU is initialized (reset) if a
low level is input to RES when
P33/HOLD is at the high level.
CPU testing
I This pin must be connected to
VSS during normal operation.
Power supply connections
Note: Pull-up MOS output: An output with a pull-up MOS transistor
CMOS output:
A complementary output
OD output:
An open drain output
Output drive type
Option
Value on reset
Normal input
• Selection of either a
ceramic oscillator or
external clock input
User Option Types
1. Port 0, 1 and 8 reset time output level option
The output levels of I/O ports 0, 1 and 8 at reset can be selected from the following two options in 4-bit units.
Option
High level output at reset time
Low level output at reset time
Conditions and notes
Ports 0, 1 and/or 8 in 4-bit sets
Ports 0, 1 and/or 8 in 4-bit sets
2. Oscillator circuit option
Option
Circuit
Conditions and notes
External clock
• This input is a Schmitt specification input.
Ceramic oscillator
Note: There is no RC oscillator option.
3. Watchdog timer option
The presence or absence of a program runaway detection function (watchdog timer) can be selected as an option.
No. 5003-6/22

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