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LC66558B View Datasheet(PDF) - SANYO -> Panasonic

Part Name
Description
Manufacturer
LC66558B Datasheet PDF : 22 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LC66556B, 66558B
Continued from preceding page.
Parameter
[External clock input conditions]
Frequency
Pulse width
Rise and fall times
Symbol
Conditions
min
OSC1: See Figure 1. With the signal input to OSC1
fext
and with OSC2 open (with external clock input
0.4
selected for the oscillator circuit option)
OSC1: See Figure 1. With the signal input to OSC1
textH, textL and with OSC2 open (with external clock input
100
selected for the oscillator circuit option)
OSC1: See Figure 1. With the signal input to OSC1
textR, textF and with OSC2 open (with external clock input
selected for the oscillator circuit option)
typ
max
Unit Note
4.35
MHz
ns
30
ns
Electrical Characteristics at Ta = –30 to + 70°C, VSS = 0 V, VDD = 3.0 to 5.5 V unless otherwise specified
Parameter
Symbol
Conditions
min
typ
max
Unit Note
Input high level current
IIH (1)
IIH (2)
IIH (3)
P2, P3 (except for the P33/HOLD pin), P6:
VIN = 13.5 V, N-channel output, transistor off
P0, P1, P4, P5, P9, PC, OSC1, RES, P33/HOLD
(except for PD, PE, PC2 and PC3):
VIN = VDD, N-channel output, transistor off
PD, PE, PC2, PC3: VIN = VDD,
N-channel output, transistor off
5.0 µA
1
1.0 µA
1
1.0 µA
1
Input low level current
Output high level voltage
IIL (1)
IIL (2)
VOH (1)
VOH (2)
Inputs other than PD, PE, PC2, PC3:
VIN = VSS, N-channel output, transistor off
PC2, PC3, PD, PE:
VIN = VSS, N-channel output, transistor off
P2, P3 (except for the P33/HOLD pin), P6, P8, P9,
PC: IOH = –1 mA
P2, P3 (except for the P33/HOLD pin), P6, P8, P9,
PC: IOH = –0.1 mA
P0, P1, P4, P5, P7, PA, PB: IOH = –50 µA
P0, P1, P4, P5, P7, PA, PB: IOH = –30 µA
–1.0
–1.0
VDD
1.0
VDD
0.5
VDD
1.0
VDD
0.5
µA
2
µA
2
V
3
V
4
Output pull-up current
Output low level voltage
Output off leakage current
Comparator offset voltage
[Schmitt characteristics]
IPO
P0, P1, P4, P5, P7, PA, PB: VIN = VSS, VDD = 5.5 V
–1.6
mA
4
VOL (1)
P0, P1, P2, P3, P4, P5, P6, P8, P9, PC
(except for the P33/HOLD pin): IOL = 1.6 mA
0.4 V
5
VOL (2) P7, PA, PB: IOL = 8 mA
1.5 V
IOFF (1) P2, P3, P6, P7, PA: VIN = 13.5 V
5.0 µA
6
IOFF (2) (except for P2, P3, P6, P7, P8 and PA): VIN = VDD
1.0 µA
6
IOFF (3) P8: VIN = VSS
–1.0
µA
7
VOFF (1) PD1, PD2, PD3: VIN = VSS to VDD – 1.5 V
±50 ±300 mV
VOFF (2) PD0: VIN = 1.5 V to VDD
±50 ±300 mV
Hysteresis voltage
High level threshold voltage
Low level threshold voltage
[Ceramic oscillator]
VHIS
Vt H
Vt L
P2, P3, RES, P6, P9, OSC1, (RC, EXT)
0.1 VDD
V
0.5 VDD
0.8 VDD
V
0.2 VDD
0.5 VDD
V
Oscillator frequency
fCF
OSC1, OSC2: See Figure 2, 4 MHz
4.0
MHz
Oscillator stabilization time
tCFS
See Figure 3, 4 MHz
10 ms
Note: 1. Common input and output ports with open-drain output specifications are specified for the state with the output N-channel transistor turned off.
These pins cannot be used for input when the CMOS output specification option is selected.
2. Common input and output ports with open-drain output specifications are specified for the state with the output N-channel transistor turned off.
Ratings for pull-up output specification pins are stipulated for the output pull-up current IPO. These pins cannot be used for input when the CMOS
output specification option is selected.
3. Stipulated for CMOS output specifications with the output N-channel transistor in the off state. (This also applies to P8 when P-channel open drain
is selected.)
4. Stipulated for pull-up output specifications with the output N-channel transistor in the off state.
5. Stipulated for P8 with CMOS output specifications.
6. Stipulated for open drain output specifications with the output N-channel transistor in the off state.
7. Stipulated for open drain output specifications with the output P-channel transistor in the off state.
Continued on next page.
No. 5003-9/22

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