MC44602 View Datasheet(PDF) - Motorola => Freescale
Part Name
Description
Manufacturer
MC44602 Datasheet PDF : 18 Pages
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MC44602
Output Power
Load Transistor
Nominal
On
Figure 32. Logic Truth Table of Functional Blocks
Demag
Fault Latch Sync
Input
Out S R Q Input
Operating Comments
<85mV
1
100
0 NOR gate driver sets Fault Latch.
At Turn–Off >85 mV, <2.5 V 0
000
Narrow spike at Sync Input (<2.5 V) as transformer voltage
rises quickly, Oscillator is not affected.
Off
>2.5 V
0
011
0 Valid Load Comparator resets Fault Latch.
Short
On
<85 mV
1
100
0 Short is not detected until transistor turn–off.
At Turn–Off >85 mV, <2.5 V 0
000
Valid Load Comparator fails to reset Fault Latch, Pulse at
1 Sync Input exceeds 2.5 V, Oscillator is disabled.
Off
<85 mV
1
000
0 Load dissipates transformer energy, Oscillator enabled.
During the initial power supply startup the controller
sequences through the Short Circuit and Overload Protection
modes as the output filter capacitors charge–up. If an output
is shorted and the auxiliary feedback winding is used to
power the control IC as in Figure 33, the VCC UVLO lower
threshold level will be reached after several cycles, disabling
the IC and initiating a new startup sequence. The Short
Circuit Protection mode can be disabled by grounding the
Sync Input. Narrow switching spikes are present on this pin
during normal operation. These spikes are caused by the rise
time of the flyback voltage from the 85 mV Demag
Comparator threshold to the 2.5 V Valid Load Comparator
threshold. In high power applications, the increased negative
current at the Load Detect Input can extend the switching
spikes to the point where they exceed the Sync Input
threshold. This problem can be eliminated by placing an
external small signal clamp diode at the Load Detect Input.
The diode is connected with the cathode at Pin 2 and the
anode at ground.
The divide–by–two toggle flip–flop will appear not to
function properly during power supply startup without
foldback, or operation with an overloaded output. This
phenomena appears at the end of the oscillator cycle if there
was not a current sense comparison, and after the flyback
voltage at the Load Detect Input failed to exceed 2.5 V. Under
these conditions, the Sync input will go high approximately
1.0 µs after the Load Detect Input exceeds the 85 mV Demag
Comparator threshold. This causes CT to discharge down
towards ground, generating a second negative going edge
on the oscillator waveform. This second edge results in the
divide–by–two flip–flop being clocked twice for each “On”
time of the switch transistor. During initial startup, this effect
can be eliminated by insuring that the Foldback Amplifier is
fully active with the addition of resistor RFB. With the Foldback
Amplifier active, the clamp level at the inverting input of the
Current Sense Comparator will be low, allowing a comparison
to take place during the switch transistor “On” time. When the
Load Detect Input exceeds 85 mV, the Sync Input will go
high, discharging CT to ground after 1.0 µs, thus eliminating
the second negative edge. Operation with the output
overloaded will cause the toggle flip–flop to be clocked twice
for each “On” time. This should not be a problem since the
next “On” time is delayed by the Demag Comparator until the
load dissipates the transformers energy.
The point where the IC detects that there is a severe
output overload, or that the transformer has reached zero
current, is controlled by the voltage of the auxiliary winding
and a resistor divider. The divider consists of an external
series resistor and an internal shunt resistor. The shunt
resistor is nominally 18 kΩ but can range from 12 kΩ to 30 kΩ
due to process variations. If more precise overload and zero
current detection is required, the internal resistor variations
can be swamped out by connecting a low value external
resistor (≤2.7 kΩ) from Pin 2 to ground.
MOTOROLA ANALOG IC DEVICE DATA
13
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