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CXD2434TQ View Datasheet(PDF) - Sony Semiconductor

Part Name
Description
Manufacturer
CXD2434TQ Datasheet PDF : 27 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
3) Phase conditions of HD, VD, TRIG, EFS and ESG
CL
HD, VD, TRIG,
EFS, ESG
0.5VDD
0.5VDD
tSETUP
tHOLD
0.5VDD
CXD2434TQ
VDD = 5.0 V, Topr = 25 °C, load capacitance of CL = 30 pF
Symbol
tSETUP
tHOLD
Definition
HD, VD, TRIG, EFS and ESG setup time, activated by CL
HD, VD, TRIG, EFS and ESG hold time, activated by CL
Min. Typ. Max. Unit
20
ns
5
ns
4) Phase characteristics of XV1, XV2, XV3, XSG, PBLK, XCPDM, XCPOB, BUSY, WEN and ID
CL
0.5VDD
XV1, XV2, XV3
BUSY, WEN, ID
XSG, PBLK,
XCPDM, XCPOB
0.5VDD
tPDCL1
0.5VDD
tPDCL2
0.5VDD
tPDCL3
0.5VDD
VDD = 5.0 V, Topr = 25 °C, load capacitance of CL = 30 pF,
load capacitance of XV1, XV2, XV3, XSG, PBLK, XCPDM, XCPOB, BUSY, WEN and ID = 10 pF
Symbol
Definition
Min. Typ. Max. Unit
tPDCL1 XV1, XV2 and XV3 delay, activated by the falling edge of CL 30
65
ns
tPDCL2 BUSY, WEN and ID delay, activated by the rising edge of CL 40
60
ns
XSG, PBLK, XCPDM and XCPOB delay, activated by the
tPDCL3
40
rising edge of CL
55
ns
—7—

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