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Q67100-Q2017 View Datasheet(PDF) - Siemens AG

Part Name
Description
Manufacturer
Q67100-Q2017
Siemens
Siemens AG Siemens
Q67100-Q2017 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
2M x 32-Bit Dynamic RAM Module
HYM 322160S/GS-60/-70
Advanced Information
2 097 152 words by 32-Bit organization
(alternative 4 194 304 words by 16-Bit)
Fast access and cycle time
60 ns access time
110 ns cycle time (-60 version)
70 ns access time
130 ns cycle time (-70 version)
Fast page mode capability with
40 ns cycle time (-60 version)
45 ns cycle time (-70 version)
Single + 5 V (± 10 %) supply
Low power dissipation
max. 4840 mW active (-60 version)
max. 4400 mW active (-70 version)
CMOS – 88 mW standby
TTL – 176 mW standby
CAS-before-RAS refresh
RAS-only-refresh
Hidden-refresh
8 decoupling capacitors mounted on
substrate
All inputs, outputs and clocks fully TTL
compatible
72 pin double-sided Single in-Line Memory
Module with 25.4 mm (1000 mil) height
Utilizes sixteen 1M × 4 DRAMs in 300 mil
SOJ packages
1024 refresh cycles / 16 ms
Tin-Lead contact pads (S - version)
Gold contact pads (GS - version)
Ordering Information
Type
HYM 322160S-60
Ordering Code
Q67100-Q2014
Package
L-SIM-72-11
HYM 322160S-70
Q67100-Q2015 L-SIM-72-11
HYM 322160GS-60
Q67100-Q2016 L-SIM-72-11
HYM 322160GS-70
Q67100-Q2017 L-SIM-72-11
Description
DRAM Module
(access time 60 ns)
DRAM Module
(access time 70 ns)
DRAM Module
(access time 60 ns)
DRAM Module
(access time 70 ns)
Semiconductor Group
551
09.94

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