NXP Semiconductors
20. Figures
Fig 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Fig 2. Pin configuration (SO16) . . . . . . . . . . . . . . . . . . . .4
Fig 3. Voltage supervisor circuit . . . . . . . . . . . . . . . . . . . .6
Fig 4. Voltage supervisor waveforms . . . . . . . . . . . . . . . .6
Fig 5. Basic layout for using an external clock. . . . . . . . .7
Fig 6. Activation sequence at t3. . . . . . . . . . . . . . . . . . .10
Fig 7. Deactivation sequence . . . . . . . . . . . . . . . . . . . . 11
Fig 8. Emergency deactivation sequence after card
removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Fig 9. Operation of debounce feature with pins OFFN,
CMDVCCN, PRESN and VCC . . . . . . . . . . . . . . .13
Fig 10. Card activation, VCC = 5 V, t0 > 30 ms. . . . . . . . .13
Fig 11. Card activation, VCC = 3 V, t0 < 15 ms. . . . . . . . .13
Fig 12. Card activation, VCC = 3 V, t0 > 15 ms. . . . . . . . .14
Fig 13. Definition of output and input transition times . . .20
Fig 14. Application diagram . . . . . . . . . . . . . . . . . . . . . . .20
Fig 15. Package outline SOT109-1 (SO16) . . . . . . . . . . .21
Fig 16. Temperature profiles for large and small
components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
TDA8034T; TDA8034AT
Smart card interface
TDA8034T_TDA8034AT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3.1 — 13 December 2012
© NXP B.V. 2012. All rights reserved.
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