Freescale Semiconductor, Inc.
PLL
ARCHIVED BY FREESCALE Sf =EMNIC(1O0N.0D1UkCHTOz)R, INC. 2005
PLL′
f′ = N′ (10 kHz)
r(f′ – f)
f = 10.01 kHz 74,000 –
10 Hz
f′ = 10 kHz w(f′ – f) + 740 kHz + N
10 kHz
N = 74,000 – r(f′ – f)
10 Hz
N′ = N + 74 + w(f′ – f)
10 kHz
(f′ – f) = w(f′ – f) + r(f′ – f)
(f′ – f) = Desired Output Frequency
w(f′ – f) = Output Frequency Portion that Divides Evenly by 10 kHz
r(f′ – f) = Remainder from Output Frequency Division by 10 kHz
Dual Mode Formulas
Example: Synthesize 76.849 930 MHz
r(f′ – f) = 9.930 kHz,
w(f′ – f) = 76.840 MHz
9.930 kHz
N = 74,000 –
= 73,007
10 Hz
f = 73,007 (10.01 kHz) = 730.800 070 MHz
N ′= 73,007 + 74 + 76.840 MHz = 80,765
10 kHz
f′ = 80,765 (10 kHz) = 807.650 000 MHz
(f′ – f)= 807.650 000 MHz – 730.800 070 MHz = 76.849 930 MHz
MC145220EVK
10
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