MC145220EVK View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

MC145220EVK

MC145220EVK Evaluation Board Manual

Motorola => Freescale 

Freescale Semiconductor, Inc.

Power passes from J8 to U5 (LM317 regulator) configured as an 8.5 V regulator. 8.5 V powers the VCOs.

ARCHIVREeDguBlaYtoFrRsEUE6SCaAnLdEUS7EuMsIeCOthNeD8U.C5TVORsu, pINpCly. 2to00p5roduce 3 V and 5 V. The ’220 board can use either to

power the logic and charge pump. V+ voltage is selected by J11. U6 and U7 are cascaded with U5 to

equalize their individual voltage drops.

The ’220 operates in both a single loop and dual loop mode. There are no component changes between

the two modes. The differences are in the programming of the counters and the SMA connector that is

used.

The PLL loop is composed of the MC145220 (U1), 733 – 743 MHz VCO (M2), and a passive loop filter

(R4, R5, C6, C7, C8). In single loop mode, output is taken from J5. A passive loop filter was used to keep

the design simple, reduce noise, and reduce the quantity of traces susceptible to stray pickup. The PLL′

loop is composed of the MC145220 (U1), 790 – 820 MHz VCO (M3), and a passive loop filter (R22, R25,

C24, C26, C30). In single loop mode, output is taken from J10.

Dual mode output is the (f′ – f) frequency output from the mixer. It is low pass filtered (L1, L2, C15, C21,

C22) then amplified (U4). The output is available at J12.

Phase detector current is 2 mA. J1 is a removable jumper used for current measurement of V+.

Two TCXOs, a Motorola Saber 14.4 MHz (M5), and Raltron 10.01 MHz (M1) are supplied. As shipped

from the factory, the 10.01 MHz TCXO is in use. This allows both the 10 kHz and 10 Hz step sizes to be

used with one TCXO. 10.01 MHz cannot be divided for larger step sizes such as 100 kHz. For larger step

sizes use the Saber. Jumpers J3, J4, J13, and J14 determine which TCXO or the external reference

input is in use.

DUAL MODE OUTPUT

The dual mode output (J12) is the difference frequency from mixing PLL and PLL′. By using a reference

frequency of 10.01 MHz, PLL can be operated with a 10.01 kHz step size and PLL′ with a 10 kHz step

size. If both PLL and PLL′ step down in frequency, the mixed output will step up by 10 Hz. More informa-

tion on the offset reference technique is in AN1277/D, Offset Reference PLLs for Fine Resolution or

Fast Hopping. The block diagram, formulas, and an example are shown in Figure 2.

REFERENCE

10.01 MHz

MOTOROLA

R COUNTER

÷ 1000

10.01 kHz

PHASE

DETECTOR

PLL

÷N

COUNTER

N = 73,001 - 74,000

PLL′

′N = 79,075 - 82,074

÷ N′

COUNTER

′R COUNTER

÷ 1001

10 kHz

PHASE

DETECTOR

VCO

730.7 - 740.7 MHz

f

MIXER

f′

(f′ – f)

60 - 80 MHz

(10 Hz STEPS)

VCO

790.7 - 820.7 MHz

Figure 2. Dual Mode Block Diagram

For More Information On This Product,

Go to: www.freescale.com

MC145220EVK

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