FAN5632 View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
FAN5632 Datasheet PDF : 14 Pages
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Pin Configuration
Top View
VSEL 1
EN 2
CB+ 3
GND 4
CB- 5
10 NC
9 VIN
8 NC
7 NC
6 VOUT
Figure 3. Pin Assignments
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
9
10
Name
VSEL
EN
CB+
GND
CB-
VOUT
NC
NC
VIN
NC
Description
Output Voltage Select Logic Input Pin. The VSEL pin cannot be left floating and must be
connected to either a logic high or logic low level.
FAN5631: If a logic low is applied to the VSEL pin, VOUT is 1.2V; if a logic high is
applied, VOUT is 1.5V.
FAN5632: If a logic low is applied to the VSEL pin, the efficiency optimization mode is enabled
and the output voltage accuracy is relaxed to meet optimum efficiency. If a logic high is
applied, the device operates like a typical charge pump converter.
Enable Input Pin. If a logic high is applied to the EN pin, the device is enabled. If a logic low is
applied, the device is disabled and the supply current is reduced to less than 1µA. The EN pin
cannot be left floating and must be connected to a logic high or logic low level.
Bucket Capacitor Positive Pin.
Ground Pin. This pin is connected to the internal MOSFET switches. This pin must be
externally connected to GND.
Bucket Capacitor Negative Pin.
Output Voltage Pin.
Not Connected. This pin is not internally connected.
Not Connected. This pin is not internally connected.
Supply Voltage Input.
Not Connected. This pin is not internally connected.
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
3
www.fairchildsemi.com
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