XRD8794AB View Datasheet(PDF) - Exar Corporation

Part Name

Description

Manufacturer

XRD8794AB

XRD8794AB Application Board

Exar Corporation 

XRD8794AB

A stair step waveform will result (See Figure 9.) By

changing the DC input, sixteen code transitions can be

observed about any DC input level. The horizontal

distance between these transitions is the code width.

Missing codes cause steps to be absent. By setting the

end point thresholds to coincide with the scope grid lines,

integral linearity errors are displayed as thresholds which

are off-centered from these grid lines. A precision DC

voltage source is necessary for the integral linearity

measurement.

Since the conversion speed is much faster than the dither

frequency, multiple readings are taken at each threshold.

The horizontal variation of each threshold gives a

qualitative measure of noise (in LSB’s).

Using this “cross plot” method is a good way to prove out

the lab setup prior to more sophisticated DSP test.

Termination Options

Termination resistors (50 Ω) can be added to the four

analog input coax BNC connectors as indicated in

Table 1. Note that the CLOCK input termination is not

optional.

Bypass Options

The reference input buffers can be bypassed with JP5

and JP7. The VRB pin of the A/D is grounded if JP6 is

inserted. The VRT pin of the A/D is connected to AVDD if

JP8 is inserted. Remove U3, the dual op amp (EL2224),

JP5, and JP7 when using these unbuffered modes.

Logic Options

A digital logic work area is provided if logic options or

timing issues are to be characterized. The work area has

100 mil spaced holes with several pads dedicated to

digital ground and the digital power supply.

Figure 9. Crossplot Staircase Output

JUMPER OPTIONS

The XRD8791AB offers flexibility through configuration

determining jumpers. These optional jumpers furnish

choices for (1) input termination resistors, (2) bypassing

of the reference input buffers, and (3) the selection of

several logic and clock options. Table 1. shows the

jumper functions along with the default configuration

set-up prior to shipment.

MP8791 IN THE XRD8794AB

The XRD8794 is pin-for-pin compatible with the MP8791.

An XRD8794AB can therefore be used to characterize

the MP8791. The MP8791 has one functional difference

that should be considered when evaluating the product.

Digital outputs of the MP8791 are not placed in a high

impedance state when the DUT clock is high. This can be

done however, by connecting the MP8791 OE to the

aperture output pin (Figure 10.) In either mode, the

XRD8794AB will capture data from the output of an

MP8791. If system timing is implemented in another

fashion please refer to the individual data sheets to

ensure proper operation.

XRD87L94 3V Operation

The XRD87L94 can be evaluated in the XRD8794AB by

simply lowering DUT AVDD and DUT DVDD to 3V.

Typically, the 74377 latches can remain operating from

the 5V provided by the separate power supply +5V

DIGITAL. If 3V logic is also to be evaluated, then lower +5

DIGITAL to 3V and swap out the 74377s.

Rev. 1.00

11

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