KAD2710L-27Q68 View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

KAD2710L-27Q68

10-Bit, 275MSPS Analog-to-Digital Converter

Unspecified 

KAD2710L 10-Bit, 275MSPS Analog-to-Digital Converter

Definitions

Analog Input Bandwidth is the analog input fre-

quency at which the spectral output power at the

fundamental frequency (as determined by FFT analy-

sis) is reduced by 3dB from its full-scale low-frequency

value. This is also referred to as Full Power Bandwidth.

Aperture Delay or Sampling Delay is the time re-

quired after the rise of the clock input for the sam-

pling switch to open, at which time the signal is held

for conversion.

Aperture Jitter is the RMS variation in aperture delay

for a set of samples.

Clock Duty Cycle is the ratio of the time the clock

wave is at logic high to the total time of one clock

period.

of all other spectral components below one half the

clock frequency, including harmonics but excluding

DC.

Signal-to-Noise Ratio (without Harmonics) is the ratio

of the RMS signal amplitude to the sum of all other

spectral components below one-half the sampling

frequency, excluding harmonics and DC.

Spurious-Free-Dynamic Range (SFDR) is the ratio of

the RMS signal amplitude to the RMS value of the

peak spurious spectral component. The peak spuri-

ous spectral component may or may not be a har-

monic.

Two-Tone SFDR is the ratio of the RMS value of either

input tone to the RMS value of the peak spurious

component. The peak spurious component may or

may not be an IMD product.

Differential Non-Linearity (DNL) is the deviation of any

code width from an ideal 1 LSB step.

Effective Number of Bits (ENOB) is an alternate

method of specifying Signal to Noise-and-Distortion

Ratio (SINAD). In dB, it is calculated as: ENOB =

(SINAD-1.76) / 6.02.

Integral Non-Linearity (INL) is the deviation of each

individual code from a line drawn from negative full-

scale (1/2 LSB below the first code transition) through

positive full-scale (1/2 LSB above the last code transi-

tion). The deviation of any given code from this line is

measured from the center of that code.

Least Significant Bit (LSB) is the bit that has the small-

est value or weight in a digital word. Its value in terms

of input voltage is VFS/(2N-1) where N is the resolution

in bits.

Missing Codes are output codes that are skipped

and will never appear at the ADC output. These

codes cannot be reached with any input value.

Most Significant Bit (MSB) is the bit that has the largest

value or weight. Its value in terms of input voltage is

VFS/2.

Pipeline Delay is the number of clock cycles between

the initiation of a conversion and the appearance at

the output pins of the corresponding data.

Power Supply Rejection Ratio (PSRR) is the ratio of a

change in power supply voltage to the input voltage

necessary to negate the resultant change in output

code.

Signal to Noise-and-Distortion (SINAD) is the ratio of

the RMS signal amplitude to the RMS value of the sum

Rev 1.1

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