CXD2589Q View Datasheet(PDF) - Sony Semiconductor

Part Name

Description

Manufacturer

CXD2589Q

CD Digital Signal Processor

Sony Semiconductor 

CXD2589Q

Pin

No.

Symbol

I/O

Description

72 XVSS

GND for master clock.

73 AVSS

— — Analog GND.

74 LOUT2 O

Right-channel LINE output.

75 AIN2

I

Right-channel operational amplifier input.

76 AOUT2 O

Right-channel analog output.

77 AVDD

— — Analog power supply (+5V).

78 AVSS

— — Analog GND.

79 XRST

I

System reset. Reset when low.

80 VDD

— — Power supply (+5V).

Notes) • PCMD is an MSB first, two's complement output.

• GTOP is used to monitor the frame sync protection status. (High: sync protection window open.)

• XUGF is the frame sync obtained from the EFM signal, and a negative pulse. It is the signal before

sync protection.

• XPLCK is the inverse of the EFM PLL clock. The PLL is designed so that the falling edge of XPLCK

and the EFM signal transition point coincide.

• GFS goes high when the frame sync and the insertion protection timing match.

• RFCK is derived with the crystal accuracy. This signal has a cycle of 136µs (during normal speed).

• C2PO represents the data error status.

• XRAOF is generated when the 16K RAM exceeds the ±4F jitter margin.

–6–

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