CXD2589Q View Datasheet(PDF) - Sony Semiconductor
Part Name
Description
Manufacturer
CXD2589Q Datasheet PDF : 61 Pages
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CXD2589Q
2. CLOK, DATA, XLAT, CNIN, SQCK and EXCK pins
(VDD = AVDD = 5.0V ± 5%, VSS = AVSS = 0V, Topr = –20 to +75°C)
Item
Symbol Min.
Typ. Max. Unit
Clock frequency
fCK
Clock pulse width
tWCK
Setup time
tSU
Hold time
tH
Delay time
tD
Latch pulse width
tWL
EXCK SQCK frequency fT
EXCK SQCK pulse width fWT
750
300
300
300
750
750∗
0.65
0.65∗
MHz
ns
ns
ns
ns
ns
MHz
ns
CLK
1/fCK
tWCK
tWCK
DATA
XLT
EXCK
CNIN
SQCK
SQSO
SBSO
tSU tH
tWT
tWT
1/fT
tSU tH
tD
tWL
∗ In pseudo double-speed playback mode, except when SQSO is Sub Q Read, the maximum operating
frequency for SQCK is 300kHz and the minimum pulse width is 1.5µs.
3. BCKI, LRCKI and PCMDI pins (VDD = AVDD = 5.0V ± 5%, VSS = AVSS = 0V, Topr = –20 to +75°C)
Item
Symbol Conditions Min.
Typ.
Max. Unit
BCK pulse width
tW
94
ns
DATAL, R setup time
tSU
18
ns
DATAL, R hold time
tH
18
ns
LRCK setup time
tSU
18
ns
tW(BCKI) tW(BCKI)
BCKI
VDD/2
VDD/2
tSU
tH
(PCMDI) (PCMDI)
PCMDI
LRCKI
tSU
(LRCKI)
–9–
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