7C1325-100 View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
Manufacturer
7C1325-100 Datasheet PDF : 13 Pages
| |||
ADVANCED INFORMATION
CY7C1325
Pin Descriptions (continued)
74, 24
DP[1:0]
15, 41, 65,
91
5, 10, 17,
21, 26, 40,
55, 60, 67,
71, 76, 90
4, 11, 20,
27, 54, 61,
70, 77
1–3, 6, 7,
14, 16, 25,
28-30,
51–53, 56,
57, 66, 75,
78, 79,
95–96
38, 39, 42,
43
VDD
VSS
VDDQ
NC
DNU
I/O-
Synchronous
Power Supply
Ground
Bidirectional Data Parity lines. These behave identical to DQ[15:0] described above.
These signals can be used as parity bits for bytes 0 and 1 respectively.
Power supply inputs to the core of the device. Should be connected to 3.3V power
supply.
Ground for the device. Should be connected to ground of the system.
I/O Power
Supply
-
Power supply for the I/O circuitry. Should be connected to a 2.5 or 3.3V power supply.
No connects.
-
Do not use pins. Should be left unconnected or tied LOW.
6
Share Link: 