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EVAL-AD5755-1SDZ View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
EVAL-AD5755-1SDZ Datasheet PDF : 45 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD5757
Timing Diagrams
SCLK
SYNC
SDIN
LDAC
IOUT_x
LDAC = 0
IOUT_x
CLEAR
IOUT_x
1
2
t6
t4
t7
MSB
t1
24
t3
t2
t5
t8
LSB
t10
t17
t19
t9
t10
t11
Data Sheet
t12
t13
t14
t12
t16
RESET
t18
Figure 3. Serial Interface Timing Diagram
SCLK
1
24
1
24
t6
SYNC
SDIN
MSB
LSB
MSB
LSB
SDO
INPUT WORD SPECIFIES
REGISTER TO BE READ
MSB
NOP CONDITION
LSB
UNDEFINED
SELECTED REGISTER DATA
t15
CLOCKED OUT
SEE THE READBACK OPERATION SECTION FOR FURTHER INFORMATION.
Figure 4. Readback Timing Diagram (Packet Error Checking Disabled)
Rev. G | Page 8 of 45

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