SI3000SSI-EVB View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
Manufacturer
SI3000SSI-EVB Datasheet PDF : 21 Pages
| |||
Si3000SSI-EVB
Several additional signals are required for proper
operation of the serial interface. As mentioned in the
clock generation section, an MCLK must be provided for
the Si3000 to operate.
FSYNC, SCLK, SDI and SDO are also required signals
to operate the Si3000. FSYNC provides the
sychronization for the audio samples. This signal
operates at the sample rate. A high to low transition
marks the beginning of a new frame.
SCLK is an output of the Si3000 providing the bit clock
for the audio samples. Data is valid on the falling edge
of SCLK following a FSYNC start transition. SDI is audio
samples to be transmitted and SDO is audio samples
received.
The serial port signals are also used during a secondary
frame to read and write the internal registers of the
Si3000. Refer to the Si3000 data sheet for more details
on internal registers and how to read and write those
registers.
When using the board in stand-alone mode (single), set
the motherboard switches as follows: SW2 = 1 and
SW3 = 1. Figure 1 shows a typical configuration in
stand-alone mode.
Table 2: Si3000SSI-EVB Modes
Configuration
Single
Slave
SW2
1
2
SW3
1
2
M1
GND
VD
M0
X
GND
In addition to JP1 and JP2 (which control the serial
mode of the local Si3000), SW2 and SW3 are used to
route the digital signals to ensure proper connection.
The SI3000SSI-EVB can be connected as a slave
through JP6. Figure 2 shows the connection of a
Si3034SSI-EVB as a master in daisy-chain mode. See
the Si3034SSI-EVB data sheet for more details.
JP5 Slave Board
1
2 Speaker Mic Line Line
SW2
In Out
RJ11
JP4
SW3
2
1
Hdst Select
RJ11 RJ11
M1 M0
To
Modem
JP5
1
2
SW2
OSC Y1
JP3
JP4
To DSP
SW3
2
1
M1 M0
JP6
VA
Power
Supply
VD
RJ11
Phone
Line
JP6
JP5
1
2
SW2
OSC Y1
JP3
JP4
To DSP
SW3
2
1
Master Board
M1 M0
JP6
VA
Power
Supply
VD
RJ11
Figure 2. Daisy-Chain Connections
Figure 1. Stand-Alone Connections
Daisy-Chain Operation
The Si3000 supports an additional serial mode which
places the device in a slave mode. This serial mode is
accomplished by M1 = VD and M0 = GND.
The Si3000SSI-EVB can essentially be used in two
modes: stand-alone (single) and slave. Table 2 shows
the configurations necessary for each mode.
The DSP or ASIC target system connects directly to the
master board. Only the master board needs a
connection to a power supply. VD is routed through JP5
and JP6.
When the Si3000SSI-EVB is used as a slave board, the
serial mode must be M1 = VD and M0 = GND. Be sure
to configure SW2 and SW3 appropriately according to
Table 2.
Line Connection
The Si3000SSI-EVB has two physical interfaces
designed to connect to the phone line. One of the
connectors is on the motherboard (Figure 8), J1 pins 3
Preliminary Rev. 0.7
3
Share Link: 