MCP3302(2002) View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
MCP3302
(Rev.:2002)
(Rev.:2002)
Microchip Technology
MCP3302 Datasheet PDF : 40 Pages
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MCP3302/04
ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise noted, all parameters apply at VDD = 5V, VSS = 0V, and VREF = 5V. Full differential
input configuration (Figure 3-4) with fixed common mode voltage of 2.5V. All parameters apply over temperature with
TAMB = -40°C to +85°C (Note 7). Conversion speed (FSAMPLE) is 100 ksps with FCLK = 21*FSAMPLE
Parameter
Symbol
Min Typ
Max
Units
Conditions
Timing Specifications:
Clock Frequency (Note 8)
Clock High Time
Clock Low Time
CS Fall To First Rising CLK Edge
Data In Setup time
Data In Hold Time
CLK Fall To Output Data Valid
CLK Fall To Output Enable
CS Rise To Output Disable
FCLK
THI
TLO
TSUCS
TSU
THD
TDO
TEN
TDIS
0.105 —
0.105 —
210
—
210
—
100
—
50
—
—
—
—
—
—
—
—
—
2.1
MHz
1.05
MHz
—
ns
—
ns
—
ns
—
ns
50
ns
125
ns
200
ns
125
ns
200
ns
100
ns
CS Disable Time
DOUT Rise Time
TCSH
475
—
—
ns
TR
—
—
100
ns
DOUT Fall Time
TF
—
—
100
ns
Power Requirements:
Operating Voltage
Operating Current
VDD
2.7
—
5.5
V
IDD
—
300
450
µA
—
200
—
Standby Current
Temperature Ranges:
IDDS
—
0.05
1
µA
Specified Temperature Range
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistance:
TA
-40
—
+85
°C
TA
-40
—
+85
°C
TA
-65
—
+150
°C
Thermal Resistance, 14L-PDIP
θJA
—
70
—
°C/W
Thermal Resistance, 14L-SOIC
θJA
—
108
—
°C/W
Thermal Resistance, 14L-TSSOP
θJA
—
100
—
°C/W
Thermal Resistance, 16L-PDIP
θJA
—
70
—
°C/W
Thermal Resistance, 16L-SOIC
θJA
—
90
—
°C/W
Note 1: This specification is established by characterization and not 100% tested.
2: See characterization graphs that relate converter performance to VREF level.
3: VIN = 0.1V to 4.9V @ 1 kHz.
4: VDD =5VP-P ±500 mV @ 1 kHz, see test circuit Figure 3-3.
5: Maximum clock frequency specification must be met.
6: VREF = 400 mV, VIN = 0.1V to 4.9V @ 1 kHz
7: TSSOP devices are only specified at 25°C and +85°C.
8: For slow sample rates, see Section 6.2.1 for limitations on clock frequency.
VDD = 5V, FSAMPLE = 100 ksps
VDD = 2.7V, FSAMPLE = 50 ksps
Note 5
Note 5
VDD = 5V, see Figure 3-1
VDD = 2.7V, see Figure 3-1
VDD = 5V, see Figure 3-1
VDD = 2.7V, see Figure 3-1
See test circuits, Figure 3-1
Note 1
See test circuits, Figure 3-1
Note 1
See test circuits, Figure 3-1
Note 1
VDD, VREF = 5V, DOUT unloaded
VDD, VREF = 2.7V, DOUT unloaded
CS = VDD = 5.0V
2002 Microchip Technology Inc.
DS21697B-page 5
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