FLASH
AS29F010
FIGURE 11: Data\ Polling Timings (During Embedded Algorithms)
NOTES: VA = Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data read cycle.
FIGURE 12: AC CHARACTERISTICS, Toggle Bit Timings (During
Embedded Algorithms)
NOTES: VA = Valid address, not required for DQ6. Illustration shows first two status cycle after command sequence, last status read cycle, and array data
read cycle.
AS29F010
Rev. 2.6 11/10
17
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