SDC2677BEVB-2(2004) View Datasheet(PDF) - Semtech Corporation

Part Name

Description

Manufacturer

SDC2677BEVB-2
(Rev.:2004)

Dual Synchronous Voltage Mode Controller with Current Sharing Circuitry

Semtech Corporation 

SC2677B

POWER MANAGEMENT

Application Information(Cont.)

1000

900

800

700

600

500

400

300

4

(R13+R19) vs.Oscillator Frequency

6 8 10 12 14 16 18 20

(R13+R19) (kohm)

Vphasing vs Phase Shift

180

160

140

120

100

80

60

40

20

0

0.55

0.60

0.65 0.70 0.75 0.80

Vphasing (V)

0.85

0.90

ICC : Supply current for controller.

QGT : Total gate charge of all selected MOSFETs.

QG : Total gate charge of per selected MOSFETs.

FSW : Switching frequency.

N : Number of MOSFET.

It is recommended that the below figure be studied to

ensure SC2677B is used under safe operating

conditions.

QGT limitation (with loading)

620

580

540

500

460

420

SOA

380

340

300

260

220

180

SOA

140

100

60

SOA

20

150 200 250 300 350 400 450 500

Fsw(KHz)

5Vin

8.5Vin

12Vin

OverCurrent Protection

Current-sense amplifiers sense the inductor DCR, and

compare with an internal OCP reference. When

overcurrent is detected, the current-sense amplifier will

trip the peak current limit on cycle-by-cycle basis. If the

overcurrent condition sustains, and the output voltage

drops below 75% of its nominal voltage level, the PWM

will be disabled and the power supply will be latched off

with a short amount of delay. The latch can be reset by

power cycling.

Controller Power Dissipation

Controller power dissipation is generated by the

following parameter; switching frequency, total gate

charge of all selected MOSFETs and supply voltage.

P = Vin * (ICC + QGT* FSW)

QGT = QG * N

Where

Vin : Supply voltage for controller and driving

MOSFET.

This example demonstrates the procedure introduced

above.

Then

Vin =12V

Fsw =250KHz

N =4(number of MOSFET)

QGT = 108nC

QG = 27nC (per MOSFET)

Layout Guidelines

Power and signal traces must be kept separate for noise

considerations. Feedback, current-sense traces and ana-

log ground should not cross any traces or planes carrying

high-switching currents, such as in the input loop or the

phase node.

The input loop, consisting of the input capacitors and

both MOSFETs must be kept as small as possible. Since

all of the high switching currents occur in the input loop,

the enclosed loop area must be kept small to minimize

inductance and radiated and conducted noise emissions.

© 2004 Semtech Corp.

8

www.semtech.com

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