AS3524 View Datasheet(PDF) - austriamicrosystems AG

Part Name

Description

Manufacturer

AS3524

Advanced Audio Processor System

austriamicrosystems AG 

AS3524 C21 / C22

Data Sheet, Confidential

austriamicrosystems

5 Detailed Functional Descriptions

5.1 ARM922-T Processor Core

5.1.1 General

The ARM922T macrocell is a high-performance 32-bit RISC integer processor combining an ARM9TDMI™ processor core with:

• 8KB instruction cache and 8 KB data cache

• Instruction and data Memory Management Unit (MMU)

• Write buffer with 16 data words and 4 addresses

• Advanced Microprocessor Bus Architecture (AMBA™) AHB interface

The ARM922T provides a high-performance processor solution for open systems requiring full virtual memory management and sophisticated

memory protection. The ARM922T processor core is capable of running at 250 MHz. The ARM922T hard macrocell has a very low power

consumption. The integrated cache helps to significantly reduce memory bandwith demands, improving performance and minimizing power

consumption.

At 250 MHz the ARM922T comsumes as little as 65 mW, making it ideal for high-performance battery operated audio or video applications.

The ARM core and associated bus structures are configured for little endian byte order (compatible with Windows CE™ and Symbian™ OS).

Table 6 ARM 922T characteristics

Cache (I/D) MMU

AHB

8KB / 8KB yes

yes

Thumb

yes

mW/MHz

MHz

0.25 @ 1.2 V 250

Features

• 32-bit RISC architecture (ARMv4T)

• Harvard architecture with separated instruction (I) and data (D) caches with 8 KB each and 8-word line length

• Five stage pipeline (fetch, decode, execute, memory, write back) enabling high master clock speeds

• 32-bit ARM instruction set for maximum performance and flexibility

• 16-bit Thumb instruction set for increased code density

• Enhanced ARM architecture V4 MMU to provide translation and access permission checks for instruction and data

addresses. With this MMU different operating systems (Windows CE, Symbian …) can be implemented.

• Industry standard AMBA bus interface (AHB and APB)

• Hard-macro implementation

• The processor core clock frequency (FCLK) is programmable up to 250MHz and the ARM922 power consumption is

directly proportional to this clock frequency FCLK

© 2003-2006, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.

www.austriamicrosystems.com

Revision 1.11

11 - 124

Share Link: