N386SX View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

N386SX

Intel387™ SX MATH COPROCESSOR

Intel 

Intel387TM SX MATH COPROCESSOR

3 2 3 DATA REGISTER

Intel387 SX Math CoProcessor data register set

consists of eight registers (R0–R7) which are treat-

ed as both a stack and a general register file Each

of these data registers in the Math CoProcessor is

80 bits wide and is divided into fields corresponding

to the Math CoProcessor’s extended-precision real

data type which is used for internal calculations

The Math CoProcessor register set can be accessed

either as a stack with instructions operating on the

top one or two stack elements or as individually ad-

dressable registers The TOP field in the status word

identifies the current top-of-stack register A ‘‘push’’

operation decrements TOP by one and loads a value

into the new top register A ‘‘store and pop’’ opera-

tion stores the value from the current top register

into memory and then increments TOP by one The

Math CoProcessor register stack grows ‘‘down’’

toward lower-addressed registers

Most of the Intel387 SX Math CoProcessor opera-

tions use the register stack as the operand(s) and or

as a place to store the result Instructions may ad-

dress the data register either implicitly or explicitly

Many instructions operate on the register at the top

of the stack These instructions implicitly address

the register at which TOP points Other instructions

allow the programmer to explicitly specify which reg-

ister to use Explicit register addressing is also rela-

tive to TOP (where ST denotes the current stack top

and ST(i) refers to the i’th register from the ST in the

stack so the real register address in computed as

STai)

3 2 4 TAG WORD (TW) REGISTER

The tag word marks the content of each numeric

data register as Figure 3-4 shows Each two-bit tag

represents one of the eight data register The princi-

pal function of the tag word is to optimize the Math

CoProcessor’s performance and stack handling by

making it possible to distinguish between empty and

non-empty register locations It also enables excep-

tion handlers to identify special values (e g NaNs or

denormals) in the contents of a stack location with-

out the need to perform complex decoding of the

actual data

3 2 5 INSTRUCTION AND DATA POINTERS

Because the Math CoProcessor operates in parallel

with the CPU any exceptions detected by the Math

CoProcessor may be reported after the CPU has ex-

ecuted the ESC instruction which caused it To allow

identification of the numeric instruction which

caused the exception the Intel386 Microprocessor

contains registers that aid in diagnosis These regis-

ters supply the address of the failing instruction and

the address of its numeric memory operand (if ap-

propriate)

The instruction and data pointers are provided for

user-written exception handlers These registers are

located in the CPU but appear to be located in the

Math CoProcessor because they are accessed by

the ESC instructions FLDENV FSTENV FSAVE

and FRSTOR which transfer the values between

the registers and memory Whenever the CPU exe-

cutes a new ESC instruction (except administrative

instructions) it saves the address of the instruction

(including any prefixes that may be present) the ad-

dress of the operand (if present) and the opcode

The instruction and data pointers appear in one of

four formats depending on the operating mode of

the CPU (protected mode or real-address mode)

and depending on the operand size attribute in ef-

fect (32-bit operand or 16-bit operand) (See Figures

3-5 3-6 3-7 and 3-8 ) Note that the value of the

data pointer is undefined if the prior ESC instruction

did not have a memory operand

15

TAG (7)

TAG (6)

TAG (5)

TAG (4)

TAG (3)

TAG (2)

TAG (1)

0

TAG (0)

NOTE

The index i of tag(i) is not top-relative A program typically uses the ‘‘top’’ field of Status Word to determine which tag(i)

field refers to logical top of stack

TAG VALUES

00 e Valid

01 e Zero

10 e QNaN SNaN Infinity Denormal and Unsupported Formats

11 e Empty

Figure 3-4 Tag Word Register

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