CM1231-02SO(2011) View Datasheet(PDF) - ON Semiconductor

Part Name

Description

Manufacturer

CM1231-02SO
(Rev.:2011)

2, 4 and 8-Channel Low-Capacitance ESD Protection Array

ON Semiconductor 

CM1231−02SO

Advantages of the CM1231−02SO Dual Stage ESD Protection Architecture

Figure 4 illustrates a single stage ESD protection device. The inductor element represents the parasitic inductance arising

from the bond wire and the PCB trace leading to the ESD protection diodes.

Connector

ASIC

Bond Wire

Inductance

ESD

Stage

Figure 4. Single Stage ESD Protection Model

Figure 5 illustrates one of the two CM1231−02SO channels. Similarly, the inductor elements represent the parasitic

inductance arising from the bond wire and PCB traces leading to the ESD protection diodes as well.

Bond Wire

Inductance

Connector

1st

Stage

Series

Element

Bond Wire

Inductance

2nd

Stage

ASIC

Figure 5. CM1231−02SO Dual Stage ESD Protection Model

CM1231−02SO Inductor Elements

In the CM1231−02SO dual stage PicoGuard XPt

architecture, the inductor elements and ESD protection

diodes interact differently compared to the single stage

model.

In the single stage model, the inductive element presents

high impedance at high frequency, i.e. during an ESD strike.

The impedance increases the resistance of the conduction

path leading to the ESD protection element. This limits the

speed that the ESD pulse can discharge through the single

stage protection element.

In the PicoGuard XPt architecture, the inductance

elements are in series to the conduction path leading to the

protected device. The elements actually help to limit the

current and voltage striking the protected device.

The reactance of the series and the inductor elements in

the second stage forces more of the ESD strike current to be

shunted through the first stage. At the same time the voltage

drop across series element helps to lower the clamping

voltage at the protected terminal.

The inductor elements also tune the impedance of the

stage by cancelling the capacitive load presented by the ESD

diodes to the signal line. This improves the signal integrity

and makes the ESD protection stages more transparent to the

high bandwidth data signals passing through the channel.

The innovative PicoGuard XPt architecture turns the

disadvantages of the parasitic inductive elements into useful

components that help to limit the ESD current strike to the

protected device and also improves the signal integrity of the

system by balancing the capacitive loading effects of the

ESD diodes.

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