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DS2251T View Datasheet(PDF) - Maxim Integrated

Part Name
Description
Manufacturer
DS2251T
MaximIC
Maxim Integrated MaximIC
DS2251T Datasheet PDF : 22 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
DS2251T
PIN
DESCRIPTION
VRST . This I/O pin (open-drain with internal pullup) indicates that the power supply (VCC)
has fallen below the VCCMIN level and the micro is in a reset state. When this occurs, the
71 DS2251T will drive this pin to a logic 0. Because the micro is lithium backed, this signal is
guaranteed even when VCC = 0V. Because it is an I/O pin, it will also force a reset if pulled
low externally. This allows multiple parts to synchronize their power-down resets.
PF . This output goes to a logic 0 to indicate that the micro has switched to lithium backup.
65 It corresponds to VCC < VLI. Because the micro is lithium backed, this signal is guaranteed
even when VCC = 0V.
55
INTB . INTB from the real-time clock. This output may be connected to a micro interrupt
input.
68
INTP . INTP from the real-time clock. This open-drain output requires a pullup and may be
connected to a micro interrupt input.
69
INTA . INTA from the real-time clock. This output may be connected to a micro interrupt
input.
70
SQW. Square-wave output from the DS1283 real-time clock. Can be programmed to output
a 1024Hz square wave.
INSTRUCTION SET
The DS2251T executes an instruction set that is object code compatible with the industry standard 8051
microcontroller. As a result, software development packages such as assemblers and compilers that have
been written for the 8051 are compatible with the DS2251T.
A complete description of the instruction set and operation are provided in the Secure Microcontroller
User’s Guide.
MEMORY ORGANIZATION
Figure 2 illustrates the memory map accessed by the DS2251T. The entire 64k of program and 64k of
data are available to the byte-wide bus. This preserves the I/O ports for application use. The user controls
the portion of memory that is actually mapped to the byte-wide bus by selecting the Program Range and
Data Range. Any area not mapped into the NV RAM is reached via the Expanded bus on Ports 0 and 2.
An alternate configuration allows dynamic Partitioning of a 64k space as shown in Figure 3. Selecting
PES = 1 provides access to the real-time clock on the DS2251T and enables PE3 and PE4 for peripheral
access as shown in Figure 4. These selections are made using Special Function Registers. The memory
map and its controls are covered in detail in the Secure Microcontroller User’s Guide.
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