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EL7556D View Datasheet(PDF) - Renesas Electronics

Part Name
Description
Manufacturer
EL7556D Datasheet PDF : 11 Pages
First Prev 11
EL7556D
OUTEN. Use of this feature is recommended during normal
operation
Power Good and Power On Reset
During power up the output regulator will be disabled until
VIN reaches a value of approximately 4.0V. Approximately
500mV of hysteresis is present to eliminate noise induced
oscillations.
Under-voltage and over-voltage conditions on the regulator
output are detected through an internal window comparator.
A logic 1 on the PWRGD output indicates that regulated
output voltage is within ±10% of the nominally programmed
output voltage. Although small, the typical values of the
PWRGD threshold will vary with changes to external
feedback (and resultant loop gain) of the system. This
dependence is shown in the typical performance curves.
Thermal Management
The EL7556D utilizes “fused lead” packaging technology in
conjunction with the system board layout to achieve a lower
thermal resistance than typically found in standard 28-pin
SO packages. By fusing (or connecting) multiple external
leads to the die substrate within the package, a very
conductive heat path to the outside of the package is
created. This conductive heat path MUST then be connected
to a heat sinking area on the PCB in order to dissipate heat
out and away from the device. The conductive paths for the
EL7556D package are the fused leads: # 7, 9, 10, 11, 12, 18,
and 19. If a sufficient amount of PCB metal area is
connected to the fused package leads, a junction-to-ambient
thermal resistance of approximately 31°C/W can be
achieved (compared to 78°C/W for a standard SO28
package). The general relationship between PCB heat-
sinking metal area and the thermal resistance for this
package is shown in the Performance Curves section of this
data sheet. It can be readily seen that the thermal resistance
for this package approaches an asymptotic value of
approximately 31°C/W without any airflow.
Additional information can be found in Application Note #8
(Measuring the Thermal Resistance of Power Surface-
Mount Packages).
If the thermal shutdown pin is connected to OUTEN the IC
will enter thermal shutdown when the maximum junction
temperature is reached. For a thermal shutdown of 135ºC
and power dissipation of 2.2W the ambient temperature is
limited to a maximum value of 67ºC (typical). The ambient
temperature range can be extended with the application of
air flow. For example, the addition of 100LFM reduces the
thermal resistance by approximately 15% and can extend
the operating ambient to 77ºC (typical). Since the thermal
performance of the IC is heavily dependent on the board
layout, the system designer should exercise care during the
design phase to ensure that the IC will operate under the
worst-case environmental conditions.
© Copyright Intersil Americas LLC 2003-2005. All Rights Reserved.
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For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7339 Rev 1.00
August 1, 2005
Page 11 of 11

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