P89LPC914 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
P89LPC914
NXP Semiconductors.
P89LPC914 Datasheet PDF : 66 Pages
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NXP Semiconductors
P89LPC912/913/914
8-bit microcontrollers with two-clock 80C51 core
Table 4. P89LPC912 pin description …continued
Symbol
Pin
Type Description
P2.2 to P2.5
I/O
Port 2: Port 2 is a 4-bit I/O port with a user-configurable output type. During reset
Port 2 latches are configured in the input only mode with the internal pull-up
disabled. The operation of Port 2 pins as inputs and outputs depends upon the port
configuration selected. Each port pin is configured independently. Refer to Section
8.12.1 “Port configurations” and Table 13 “Static characteristics” for details.
All pins have Schmitt triggered inputs.
Port 2 also provides various special functions as described below:
P2.2/MOSI
1
I/O
P2.2 — Port 2 bit 2.
I/O
MOSI — SPI master out slave in. When configured as master, this pin is output,
when configured as slave, this pin is input.
P2.3/MISO
14
I/O
P2.3 — Port 2 bit 3.
I/O
MISO — SPI master in slave out. When configured as master, this pin is input,
when configured as slave, this pin is output.
P2.4/SS
9
I/O
P2.4 — Port 2 bit 4.
I
SS — SPI Slave select.
P2.5/SPICLK 2
I/O
P2.5 — Port 2 bit 5.
I/O
SPICLK — SPI clock. When configured as master, this pin is output, when
configured as slave, this pin is input.
P3.0 to P3.1
I/O
Port 3: Port 3 is a 2-bit I/O port with a user-configurable output type. During reset
Port 3 latches are configured in the input only mode with the internal pull-up
disabled. The operation of Port 3 pins as inputs and outputs depends upon the port
configuration selected. Each port pin is configured independently. Refer to Section
8.12.1 “Port configurations” and Table 13 “Static characteristics” for details.
All pins have Schmitt triggered inputs.
Port 3 also provides various special functions as described below:
P3.0/XTAL2/ 8
CLKOUT
I/O
P3.0 — Port 3 bit 0.
O
XTAL2 — Output from the oscillator amplifier (when a crystal oscillator option is
selected via the flash configuration).
O
CLKOUT — CPU clock divided by 2 when enabled via SFR bit (ENCLK - TRIM.6).
It can be used if the CPU clock is the internal RC oscillator, watchdog oscillator or
external clock input, except when XTAL1/XTAL2 are used to generate clock source
for the Real-Time clock/system timer.
P3.1/XTAL1 7
I/O
P3.1 — Port 3 bit 1.
I
XTAL1 — Input to the oscillator circuit and internal clock generator circuits (when
selected via the flash configuration). It can be a port pin if internal RC oscillator or
watchdog oscillator is used as the CPU clock source, and if XTAL1/XTAL2 are not
used to generate the clock for the Real-Time clock/system timer.
VSS
4
I
Ground: 0 V reference.
VDD
10
I
Power Supply: This is the power supply voltage for normal operation as well as Idle
and Power-down modes.
P89LPC912_913_914_5
Product data sheet
Rev. 05 — 28 September 2007
© NXP B.V. 2007. All rights reserved.
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