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ATMEGA161 View Datasheet(PDF) - Atmel Corporation

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ATMEGA161 Datasheet PDF : 134 Pages
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ALU Arithmetic Logic Unit
The high-performance AVR ALU operates in direct connection with all the 32 general purpose working registers. Within a
single clock cycle, ALU operations between registers in the register file are executed. The ALU operations are divided into
three main categories arithmetic, logical, and bit-functions. ATmega161 does also provide a powerful multiplier support-
ing both signed/unsigned multiplication and fractional format. See Instruction Set section for a detailed description.
Self-programmable Flash Program Memory
The ATmega161 contains 16K bytes on-chip Self- and In-System programmable Flash memory for program storage. Since
all instructions are 16- or 32-bit words, the Flash is organized as 8K x 16. The Flash memory has an endurance of at least
1000 write/erase cycles. The ATmega161 Program Counter (PC) is 13 bits wide, thus addressing the 8192 program
memory locations.
See page 95 for a detailed description on Flash data downloading.
See page 11 for the different program memory addressing modes.
EEPROM Data Memory
The ATmega161 contains 512 bytes of data EEPROM memory. It is organized as a separate data space, in which single
bytes can be read and written. The EEPROM has an endurance of at least 100,000 write/erase cycles per location. The
interface between the EEPROM and the CPU is described on page 54 specifying the EEPROM address registers, the
EEPROM data register, and the EEPROM control register.
For the SPI data downloading, see page 109 for a detailed description.
Figure 8. SRAM Organization
Register File
R0
R1
R2
º
Data Address Space
$0000
$0001
$0002
º
R29
R30
R31
I/O Registers
$00
$01
$02
$001D
$001E
$001F
$0020
$0021
$0022
$3D
$005D
$3E
$005E
$3F
$005F
Internal SRAM
$0060
$0061
º
$045E
$045F
10
ATmega161(L)

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