UPD78F0828AGC(A)-8BT View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

Manufacturer

UPD78F0828AGC(A)-8BT

8-bit Single-Chip Microcontroller

NEC => Renesas Technology 

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Pin Configuration ......................................................................................................... 27

78K/0 Series Expansion .............................................................................................. 29

Block Diagram ............................................................................................................. 31

Connection of IC Pins.................................................................................................. 44

Pin Input/Output Circuits (1/3) ..................................................................................... 47

Memory Map of the µPD780824A ............................................................................... 51

Memory Map of the µPD780826A ............................................................................... 52

Memory Map of the µPD780828A ............................................................................... 53

Memory Map of the µPD78F0828A ............................................................................. 54

Data Memory Addressing of µPD780824A ................................................................. 58

Data Memory Addressing of µPD780826A ................................................................. 59

Data Memory Addressing of µPD780828A ................................................................. 60

Data Memory Addressing of µPD78F0828A ............................................................... 61

Program Counter Configuration .................................................................................. 62

Program Status Word Configuration ........................................................................... 62

Stack Pointer Configuration......................................................................................... 64

Data to be Saved to Stack Memory............................................................................. 64

Data to be Reset to Stack Memory ............................................................................. 64

General Register Configuration ................................................................................... 65

Relative Addressing .................................................................................................... 70

Immediate Addressing................................................................................................. 71

Table Indirect Addressing............................................................................................ 72

Register Addressing .................................................................................................... 73

Register Addressing .................................................................................................... 75

Direct addressing ........................................................................................................ 76

Short direct addressing ............................................................................................... 77

Special-Function Register (SFR) Addressing.............................................................. 78

Register indirect addressing ........................................................................................ 79

Based addressing description example....................................................................... 80

Based indexed addressing description example ......................................................... 81

Stack addressing description example ........................................................................ 82

Port Types ................................................................................................................... 83

P00 to P03 Configurations .......................................................................................... 87

P10 to P14 Configurations .......................................................................................... 88

P20 to P27 Configurations .......................................................................................... 89

P34 to P37 Configurations .......................................................................................... 90

P40 to P47 Configurations .......................................................................................... 91

P50 to P57 Configurations .......................................................................................... 92

P60 to P65 Configurations .......................................................................................... 93

P80 to P87 Configurations .......................................................................................... 94

P90 to P97 Configurations .......................................................................................... 95

Port Mode Register Format ......................................................................................... 97

Pull-Up Resistor Option Register (PUm) Format......................................................... 98

Port Function Register (PF3, PF4, PF8 and PF9) Format........................................... 99

Block Diagram of Clock Generator ............................................................................ 103

Processor Clock Control Register Format ................................................................. 104

External Circuit of Main System Clock Oscillator ...................................................... 105

Examples of Oscillator with Bad Connection (1/3) .................................................... 106

System Clock and CPU Clock Switching................................................................... 111

Timer 2 (TM2) Block Diagram ................................................................................... 113

16-Bit Timer Mode Control Register (TMC2) Format ................................................ 116

Capture Pulse Control Register (CRC2) Format ....................................................... 117

Prescaler Mode Register (PRM2) Format ................................................................. 118

Configuration Diagram for Pulse Width Measurement

by Using the Free Running Counter .......................................................................... 119

User’s Manual U16504EE1V1UD00

15

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