UPD78F0828A View Datasheet(PDF) - NEC => Renesas Technology
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UPD78F0828A Datasheet PDF : 472 Pages
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A/D Conversion End Interrupt Request Generation Timing....................................... 194
D/A Converter Mode Register (DAM0) Format.......................................................... 195
Block Diagram of SIO30 ............................................................................................ 197
Format of Serial Operation Mode Register (CSIM30) ............................................... 199
Format of Serial Operation Mode Register (CSIM30) ............................................... 200
Format of Serial Operation Mode Register (CSIM30) ............................................... 201
Timing of Three-wire Serial I/O Mode........................................................................ 202
Block Diagram of SIO31 ............................................................................................ 206
Format of Serial Operation Mode Register (CSIM31) ............................................... 208
Format of Serial Mode Switch Register (SIOSWI)..................................................... 209
Format of Serial Operation Mode Register (CSIM31) ............................................... 210
Format of Serial Operation Mode Register (CSIM31) ............................................... 211
Format of Serial Mode Switch Register (SIOSWI)..................................................... 212
Format of Serial Operation Mode Register (CSIM31) ............................................... 213
Format of Serial Mode Switch Register (SIOSWI)..................................................... 214
Timing of Three-wire Serial I/O Mode........................................................................ 215
Timing of Two-wire Serial I/O Mode .......................................................................... 215
Block Diagram of UART ............................................................................................ 217
Format of Asynchronous Serial Interface Mode Register (ASIM0) (1/2) ................... 220
Format of Asynchronous Serial Interface Status Register (ASIS0) ........................... 222
Format of Baud Rate Generator Control Register (BRGC0) (1/2)............................. 223
Register Settings ....................................................................................................... 225
Format of Asynchronous Serial Interface Mode Register (ASIM0) (1/2) ................... 226
Format of Asynchronous Serial Interface Status Register (ASIS0) ........................... 228
Format of Baud Rate Generator Control Register (BRGC0) (1/2)............................. 229
Error Tolerance (when k = 0), including Sampling Errors.......................................... 232
Format of Transmit/Receive Data in Asynchronous Serial Interface......................... 233
Timing of Asynchronous Serial Interface Transmit Completion Interrupt .................. 235
Timing of Asynchronous Serial Interface Receive Completion Interrupt ................... 236
Receive Error Timing................................................................................................. 237
Data Frame ............................................................................................................... 241
Remote Frame .......................................................................................................... 241
Data Frame ............................................................................................................... 242
Arbitration Field/Standard Format Mode ................................................................... 242
Arbitration Field/Extended Format Mode................................................................... 243
Control Field (Standard Format Mode)...................................................................... 244
Control Field (Extended Format Mode) ..................................................................... 244
Data Field .................................................................................................................. 245
CRC Field .................................................................................................................. 245
ACK Field .................................................................................................................. 246
End of Frame............................................................................................................. 246
Interframe Space/Error Active ................................................................................... 247
Interframe Space/Error Passive ................................................................................ 247
Error Frame ............................................................................................................... 248
Overload Frame ........................................................................................................ 249
Nominal Bit Time (8 to 25 Time Quanta) ................................................................... 255
Adjusting Synchronization of the Data Bit ................................................................. 256
Bit Synchronization.................................................................................................... 257
Transmission State Shift Chart.................................................................................. 258
Reception State Shift Chart ....................................................................................... 259
Error State Shift Chart ............................................................................................... 260
Structural Block Diagram........................................................................................... 261
Connection to the CAN Bus ...................................................................................... 262
Transmit Message Definition Bits ............................................................................. 266
Transmit Identifier ..................................................................................................... 267
Transmit Data ........................................................................................................... 268
Control bits for Receive Identifier ............................................................................. 271
Receive Status Bits (1/2) .......................................................................................... 272
User’s Manual U16504EE1V1UD00
17
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